Paper
30 December 2008 CRISP: a flexible integrated development platform for RFID systems
Author Affiliations +
Proceedings Volume 7268, Smart Structures, Devices, and Systems IV; 72681N (2008) https://doi.org/10.1117/12.810645
Event: SPIE Smart Materials, Nano- and Micro-Smart Systems, 2008, Melbourne, Australia
Abstract
In this paper we present an introduction to Cognitive RFID Integrated System Platform (CRISP), a framework for development and implementation of RFID communication protocols. The framework enables advanced research in the area of RFID wireless communication protocols and algorithms by interfacing a large class of experimental medium access control (MAC) with custom physical layer (PHY) implementations. As such, CRISP provides a flexible, scalable, configurable and high performance RFID research tool. The low level protocol handling routines are written in VHDL and higher level functions are programmed in C and targeted to embedded Microblaze soft-core processor within the Xilinx Virtex 5 class of FPGAs. Furthermore, the online open-access repository from The University of Adelaide is available to document and share different architecture and designs with other researchers in the field.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Behnam Jamali "CRISP: a flexible integrated development platform for RFID systems", Proc. SPIE 7268, Smart Structures, Devices, and Systems IV, 72681N (30 December 2008); https://doi.org/10.1117/12.810645
Lens.org Logo
CITATIONS
Cited by 1 scholarly publication.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Field programmable gate arrays

Digital signal processing

Telecommunications

Signal processing

Software development

Analog electronics

System integration

RELATED CONTENT

Universal DSP module interface
Proceedings of SPIE (September 14 2010)
Multimedia electronic mail
Proceedings of SPIE (August 01 1990)
Turbo decoder core design for system development
Proceedings of SPIE (April 21 2003)
A scalable multi FPGA framework for real time digital signal...
Proceedings of SPIE (September 02 2009)

Back to Top