EUV mask defect analysis from mask to wafer printing

Yoonsuk Hyun; Kangjoon Seo; Kyuyoung Kim; Inhwan Lee; Byounghoon Lee; Sunyoung Koo; Jongsu Lee; Sukkyun Kim; Seomin Kim; Myoungsoo Kim; Hyosang Kang

doi:10.1117/12.2010091

1 April 2013 EUV mask defect analysis from mask to wafer printing

Yoonsuk Hyun, Kangjoon Seo, Kyuyoung Kim, Inhwan Lee, Byounghoon Lee, Sunyoung Koo, Jongsu Lee, Sukkyun Kim, Seomin Kim, Myoungsoo Kim, Hyosang Kang

Author Affiliations +

Proceedings Volume 8679, Extreme Ultraviolet (EUV) Lithography IV; 86790G (2013) https://doi.org/10.1117/12.2010091
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

ASML NXE3100 has been introduced for EUV Pre-Production, and ASML NXE3300 for High Volume Manufacturing will be installed from this year. EUV mask defect control is the one of the concerns for introducing EUVL to device manufacturing, for current EUV mask defect level is too high to accept for device volume production. EUV mask defects come from mask blank, mask process and mask handling. To have reduced mask defect level, quality control of blank mask, optimization of EUV mask process and improvement of EUV mask handling need to be ready. In this paper, we analyze printed defects exposed from EUV full field mask at NXE3100. For this analysis we trace mask defects from mask to wafer printing. From this we will show current EUV mask’s defect type and numbers. Acceptable defect type, size and numbers for device manufacturing with EUVL will be shown. Through investigating printing result of natural ML defects, realistic level of natural ML defects will be shown.

Citation Download Citation

Yoonsuk Hyun, Kangjoon Seo, Kyuyoung Kim, Inhwan Lee, Byounghoon Lee, Sunyoung Koo, Jongsu Lee, Sukkyun Kim, Seomin Kim, Myoungsoo Kim, and Hyosang Kang "EUV mask defect analysis from mask to wafer printing", Proc. SPIE 8679, Extreme Ultraviolet (EUV) Lithography IV, 86790G (1 April 2013); https://doi.org/10.1117/12.2010091

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