Advanced gate CDU control in sub-28nm node using poly slot process by scatterometry metrology

Wei-Jhe Tzai; Howard Chen; Jun-Jin Lin; Yu-Hao Huang; Chun-Chi Yu; Ching-Hung Bert Lin; Sungchul Yoo; Chien-Jen Eros Huang; Lanny Mihardja

doi:10.1117/12.2011620

10 April 2013 Advanced gate CDU control in sub-28nm node using poly slot process by scatterometry metrology

Wei-Jhe Tzai, Howard Chen, Jun-Jin Lin, Yu-Hao Huang, Chun-Chi Yu, Ching-Hung Bert Lin, Sungchul Yoo, Chien-Jen Eros Huang, Lanny Mihardja

Author Affiliations +

Proceedings Volume 8681, Metrology, Inspection, and Process Control for Microlithography XXVII; 86811T (2013) https://doi.org/10.1117/12.2011620
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

Scatterometry-based metrology is a well proven method to measure and monitor the critical dimensions of interest in advanced sub-28nm process development and high volume manufacturing [1][3][4][6][7]. In this paper, a proposed solution to control and achieve the optimal gate critical dimension uniformity (CDU) was explored. The proposed solution is named a novel scatterometry slot gate CDU control flow. High performance measurement and control during the slot gate step is critical as it directly controls the poly line cut profile to the active area which then directly impacts the final device performance. The proposed flow incorporates scatterometry-based CD (SCD) measurement feedback and feed forward to the Automation Process Control (APC) system, further process recipe fine tuning utilizing the data feedback and forward, and two dimensional (2D) and three dimensional (3D) scatterometry-based CD (SCD) measurement of gate after developer inspection (ADI) and after etch inspection (AEI) [1]. The methodologies and experiment results presented in this study started from the process development through the SCD model optimization of the DOE wafers, to the final implementation of the process control flow and measurement loop into the production line to evaluate its capability for long term in-line monitoring in high volume manufacturing environment. The result showed significant improvement in the gate CD uniformity that met the sub-28nm process manufacturing requirement.

Citation Download Citation

Wei-Jhe Tzai, Howard Chen, Jun-Jin Lin, Yu-Hao Huang, Chun-Chi Yu, Ching-Hung Bert Lin, Sungchul Yoo, Chien-Jen Eros Huang, and Lanny Mihardja "Advanced gate CDU control in sub-28nm node using poly slot process by scatterometry metrology", Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 86811T (10 April 2013); https://doi.org/10.1117/12.2011620

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
10 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Single crystal X-ray diffraction

Semiconducting wafers

Critical dimension metrology

Metrology

Process control

Scatterometry

3D modeling

Show All Keywords

Keywords/Phrases

Search In:

Publication Years