Novel and cost-effective multiple patterning technology by means of invisible SiOxNy hardmask

Linus Jang; Young Joon Moon; Ryoung-Han Kim; Christopher Bencher; Huixiong Dai; Peng Xie; Daniel L. Diehl; Yong Cao; Wilson Zeng; Christopher S. Ngai

doi:10.1117/12.2046107

27 March 2014 Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask

Linus Jang, Young Joon Moon, Ryoung-Han Kim, Christopher Bencher, Huixiong Dai, Peng Xie, Daniel L. Diehl, Yong Cao, Wilson Zeng, Christopher S. Ngai

Author Affiliations +

Proceedings Volume 9051, Advances in Patterning Materials and Processes XXXI; 90510Y (2014) https://doi.org/10.1117/12.2046107
Event: SPIE Advanced Lithography, 2014, San Jose, California, United States

Abstract

The Cost of Ownership (CoO) for semiconductor processing has been primarily dominated by lithography. In multiple patterning processes, additional materials and the impact to throughput of multiple patterning passes appear to become additional major contributors to manufacturing cost as well. We introduce SiO_xN_y hardmask as a new memorization layer for multiple patterning that addresses the non-lithographic cost contributor to manufacturing. The optical constants of the SiO_xN_y hardmask are matched to those of the photoresist at the imaging wavelength, and that makes it invisible at the exposure wavelength, enabling lithography directly over the hardmask topography, while at the same time it will be visible to those wavelengths that are used for alignment and overlay. The SiO_xN_y hardmask is inserted below the photoresist which will make the rework and integration schemes much simpler and result in cost savings by replacing only photoresist layers during multiple patterning processes. Additionally, by eliminating the need for traditional spincast planarization and the associated tri-layer etch we can improve the critical dimension uniformity (CDU) and reduce proximity contributions from etch, and their respective etch proximity corrections. In this work, we engineered the lithographic stack to be compatible with the invisible SiO_xN_y hardmask. Lithographic process windows, CDU, and LER/LWR are compared with conventional tri-layer stack and we demonstrate triple patterning memorized into the SiO_xN_y hardmask after which patterns are then transferred, at once, into the bottom integrated stack. Finally, major benefits of using the invisible hardmask on device scaling and patterning challenges are discussed, such as for LE2, LE3, and trench and cut patterning.

Citation Download Citation

Linus Jang, Young Joon Moon, Ryoung-Han Kim, Christopher Bencher, Huixiong Dai, Peng Xie, Daniel L. Diehl, Yong Cao, Wilson Zeng, and Christopher S. Ngai "Novel and cost-effective multiple patterning technology by means of invisible SiO_xNy hardmask", Proc. SPIE 9051, Advances in Patterning Materials and Processes XXXI, 90510Y (27 March 2014); https://doi.org/10.1117/12.2046107

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available