2.2.1

γ-ray imaging

γ-ray cameras have applications in nuclear material detection, astronomy, nuclear medicine, nuclear power systems, and other fields where radioactive sources are used.⁵ Traditionally, crystal scintillators, such as CsI, which absorb the radiation and emit visible light, were used in combination with photomultiplier arrays for detection of γ-rays.

Recently, CMOS arrays that are either coated with scintillators or vertically integrated with materials that are direct converters of γ-rays, such as CdZnTe, have been demonstrated.^6,7 Although γ-ray photons cannot be focused, image demagnification can be performed by use of collimators, as done in single-photon emission computed tomography (SPECT) imaging systems.

2.2.2

X-ray imaging

Medical X-ray imaging applications include mammography, radiography, and image-guided therapy. X-ray cameras are also used in security screening, industrial inspection, and astronomy. In general, X-ray imaging is performed without any demagnification mechanism. Die tiling, as shown in Fig. 3(a), is needed with X-ray sensors that are based on CMOS devices, when the specified imaging area exceeds maximal die area that is feasible with CMOS processes.

Figure 3.

(a) Die tiling is used in X-ray image sensors to fulfill the requirement for large-area arrays because X-ray imaging is done without image demagnification. (b) Pixel in an uncooled IR image sensor with a microbolometer device.

There are two approaches for detection of X-rays in electronic image sensors.⁸ The indirect approach employs scintillator films that absorb X-rays to emit photons in the visible band. Commonly used scintillators are CsI and Gadox. The direct approach is based on materials, such as a-Se, HgI₂, and CdZnTe,⁹ that absorb X-rays to generate free charge carriers.

Image quality is better with the direct approach because, with scintillators, the emitted photons may not have the same directions as the absorbed X-rays, which causes image blur. However, direct converters operate under voltage levels that are significantly higher than those used with CMOS devices. Readout arrays for X-ray image sensors have been demonstrated with hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT),¹⁰ CCD,¹¹ and CMOS¹² devices.

2.2.3

UV imaging

Applications for ultraviolet (UV) imaging include space research, daytime corona detection,¹³ missile detection, and UV microscopy. UV radiation from the sun in the range of 240 to 280 nm is completely blocked from reaching the Earth by the ozone layer in the stratosphere. A camera that is sensitive only to this region will not see any photons from the sun.

UV cameras based on monolithic crystalline silicon (c-Si) image sensors are available commercially. Examples include the Hamamatsu ORCA II BT 512, which uses a back-illuminated CCD sensor,¹⁴ and the Intevac MicroVista camera, which uses a back-illuminated CMOS sensor.¹⁵

2.2.4

Visible-band imaging

Most visible-band imaging applications involve a lens that creates a sharp image on the focal plane, where the image sensor is placed. However, there are visible-band applications, such as lab-on-chip, where imaging is done without a lens. ¹⁶ Fortunately, c-Si, which is the most commonly used semiconductor by the industry, is sensitive to visible light. Color and other aspects of the human visual system are crucial for design and evaluation of image sensors in this band.

2.2.5

IR imaging

The infrared (IR) band is divided here into two regions. Near IR lies between 0.7 and 1.0 μm. With bandgap of 1. 12 eV, c-Si is sensitive to radiation in this band. IR refers to longer wavelengths, where other types of photodetectors must be used. IR photodetectors may be categorized as either semiconductor or micro-electromechanical system (MEMS) devices.

Operating principles of semiconductor photodetectors are based on solid-state physics, where free charge carriers are generated by absorption of photons. Alloys of mercury cadmium telluride (MCT) are commonly used for detection of IR radiation. Because photon energy in this band is on the order of thermal energy at room temperature, semiconductor photodetectors must be cooled.

Operating principles of MEMS IR detectors, called microbolometers, are based on change in electrical properties of conductive films as a result of temperature increase with exposure to IR radiation. Microbolometers do not require cooling, and can be directly deposited on a CMOS readout circuit array,¹⁷ as illustrated in Fig. 3(b).

IR imaging applications include medical imaging (e.g., breast thermography), night vision cameras, and building inspection (e.g., detection of hot spots and water). With modern IR cameras, image sensors with pixel pitch of 17 μm or higher are readily available.¹⁸

2.2.6

THz imaging

The THz region lies between optical wavelengths and electronic wavelengths or microwaves. Challenges with generation and detection of THz radiation made THz imaging impractical until recently. However, imaging in this band is attractive because THz is a non-ionizing radiation that presents a promising alternative to X-rays in various applications.

The technology takes advantage of the transparency of air particles, such as dust and smoke, and of thin layers, such as plastic, paper, and clothing, to THz rays, versus the high absorption coefficient of water and metals. This allows sensors to “see through” materials that are opaque in other regions of the electromagnetic spectrum.

THz imaging has applications in medical diagnosis, such as identification of dental caries and determination of hydration levels, space research, industrial quality, and food control. Currently, the THz market mainly focuses on security screening, as the technology allows detection of hidden weapons and chemicals used in explosives. ¹⁹

There are two main approaches for fabrication of THz sensors. With monolithic CMOS sensors, each pixel includes an antenna that couples THz waves to a CMOS transistor. The transistor rectifies the THz signal and converts it into a continuous voltage. With hybrid sensors, microbolometer detectors are directly deposited on CMOS devices. Typical pixel pitch is around 150 μm^20,21 with the former approach, and 50 μm²² with the latter approach, which resembles the uncooled IR imaging approach.

3.1.1

PD-based ADCs

In the time-to-first-spike approach, also called time to saturation, a circuit that controls and records integration time is included in each pixel. ²⁵ As shown in Fig. 5(a), the pixel has a PD circuit whose voltage is sensed by a comparator. At the beginning of an integration, the reset line is activated, which charges the PD capacitance. During integration, V_PD drops as charge accumulates on the PD capacitance.

Figure 5.

(a) In time-to-first-spike pixels, a control circuit, triggered by a comparator, stops integration and stores the time required for V_PD to reach V_ref. (b) Under brighter light, less time is required and a lower value is latched in the memory. (c) In light-to-frequency conversion pixels, when V_PD reaches V_ref, a comparator increments a counter and resets the photodiode. (d) Brighter lights lead to higher frequencies on V_comp and higher values in the counter.

When V_PD falls below a global reference voltage, V_ref, the comparator generates a pulse. This pulse triggers a circuit that records integration time in a memory unit and stops integration for this pixel to avoid saturation. At the end of the frame, the value that was latched in the memory is read. It is then used to determine the relative brightness level for each pixel in order to construct a digital image. Fig. 5(b) shows the circuit waveforms of a pixel under a bright and dim light.

In the light-to-frequency conversion approach, also called intensity-to-frequency conversion, the brightness level is converted into frequency²⁶ by repeatedly resetting the PD capacitance over the frame period. Fig. 5(c) shows the schematic of a light-to-frequency conversion pixel. ²⁷ Waveforms of the pixel under bright and dim light are shown in Fig. 5(d). Note the similarities between this pixel and the previous one.

At the beginning of a frame, the reset line is activated to charge the PD capacitance. During exposure, V_PD drops as the photocurrent progressively discharges the capacitance. When V_PD drops below V_ref, the comparator generates a pulse that increments the counter and triggers a feedback circuit to recharge the capacitance. A new integration cycle is then initiated, and the process is repeated until a fixed period elapses. At the end of the frame period, the value that is stored in the counter is read, and the counter is reset to zero.

3.1.2

SPAD-based ADCs

With PD-based digital pixels, the detector output is an analog signal. It is converted to a digital signal via a circuit that utilizes the PD, e.g., its reverse-biased capacitance. However, with SPAD-based digital pixels, the detector output is a pulsed signal, where each pulse represents a detected photon, and the subsequent circuit blocks detect each pulse and use it to increment a counter.

Because SPAD operation requires high voltage levels to accelerate electrons in high electric fields, their structure must allow enough distance for charge acceleration and include guard rings for voltage isolation. This results in a layout area that is substantially larger than that of a standard PD. Therefore, PDs make a better choice for applications where small pixels and system compactness are desirable. SPADs are preferred for low-light and time-of-flight imaging applications.

When an electron-hole pair is generated in a SPAD, either by a photon absorption or by a thermal reaction, the free charge carriers are accelerated by the high electric field across the junction, generating additional carriers by impact ionization. ²⁸ To allow detection of subsequent photons, the avalanche process must be quenched, which can be achieved by lowering the SPAD voltage to a level below V_BD. This can be easily done by connecting a high impedance ballast resistor, R_B, in series with the SPAD.

When the circuit is inactive, the SPAD is biased to V_bias > V_BD through R_B. When a photon is absorbed and successfully triggers an avalanche, the current rises abruptly. This results in development of a high voltage drop over R_B that acts as a negative feedback to lower the voltage drop over the SPAD. In this manner, the avalanche current quenches itself, and the edge of an avalanche pulse marks the arrival time of a detected photon.

Fig. 6(a) shows this passive quenching circuit (PQC), as it is called. A comparator to perform edge detection and a counter are also used. Waveforms of the SPAD current and voltage are shown in Fig. 6(b). PQCs are suitable for SPAD arrays thanks to their simplicity and small area. However, they suffer from afterpulsing and a long reset time,²⁹ which may be overcome by additional circuitry. Mixed passive-active quenching circuits are commonly used in SPAD arrays because they offer better performance. They include a feedback circuit that starts quenching the SPAD as soon as an avalanche is sensed.

Figure 6.

(a) A SPAD-based pixel with PQC has a serially-connected ballast resistor, a circuit that performs edge detection, and a counter. (b) Waveforms of the SPAD current and voltage, indicating Geiger operation, quenching, and reset.

3.2.1

Nyquist-rate ADCs

With CMOS APS arrays, flash^40,41 and pipelined^42–44 ADCs are commonly used for chip-level data conversion. Cyclic,^45,46 successive approximation (SAR),^47,48 oversampling,^49,50 and integrating^51-53 ADCs have all been demonstrated for column-level data conversion. Except for the oversampling cases, of course, all these ADCs are Nyquist-rate ADCs.

There has been much interest in adapting Nyquist-rate ADCs for pixel-level data conversion. The examples illustrated here come from a research program at Stanford University that has resulted in commercialized DPS technology. While the authors called one version of their design,³¹ illustrated in Figs. 7(a) and (b), a single-slope integrating ADC, it is technically a ramp-compare ADC, which has more in common with flash ADCs than with integrating ADCs.

Figure 7.

(a) In ramp-compare ADC pixels, erroneously called single-slope integrating ADC pixels, the detector output Vsense is compared to an external ramp V_ramp. (b) When V_sense – V_ramp changes sign, a ramp counter is latched in pixel memory. (c) In MCBS ADC pixels, there is only one bit stored per pixel, which saves area. (d) Ramp comparison is done multiple times in sequence, each time to resolve one bit of a code that identifies the ramp value.

An n-bit flash ADC has 2ⁿ comparators that each perform one comparison in parallel. The ramp-compare ADC replaces this parallel operation with a serial operation, where one comparator performs 2ⁿ comparisons in sequence. A ramp voltage is generated and compared to the ADC input voltage. When there is a sign change in the comparison, a digital code representing the ramp voltage is latched. An n-bit digital-to-analog converter (DAC) may be used to generate the ramp voltage in steps, as well as to provide the latched code, i.e., the DAC input that triggers the sign change.

Yang et al.³⁰ demonstrated a DPS array that is based on multichannel bit serial (MCBS) ADCs. The MCBS design, illustrated in Figs. 7(c) and (d), is similar to the ramp-compare design, but includes modifications that have allowed it to be commercialized for visible-band applications. Unlike with the ramp-compare ADC, bits are obtained in a serial manner to significantly reduce pixel area. For n-bit resolution, the “same” ADC input is compared n times in a single frame to the “same” 2ⁿ-valued ramp signal. One bit is resolved (and read out) each time, so the pixel needs to contain only one latch bit, instead of all n bits.

3.2.2

Oversampling ADCs

As shown in Table 3, ADC architectures may be divided into three groups based on conversion speed and accuracy.⁵⁴ Inside the pixel, video capture is a low-bandwidth, i.e., low-speed, application that demands high bit-resolution, i.e., high accuracy, for high image quality. These specifications make oversampling ADCs, such as delta-sigma (ΔΣ) ADCs, especially suitable for pixel-level data conversion.

Table 3.

Comparison of classical ADC architectures.

DPS arrays have been realized with first-order ΔΣ modulators inside each pixel.^36-38 Higher-order ΔΣ modulators demonstrate better noise-shaping performance. However, they take more area and power. Although ΔΣ modulators are oversampling ADCs, they are not ΔΣ ADCs. In a ΔΣ ADC, the digital output of the modulator is processed by a decimator, a digital circuit that performs low-pass filtering and down-sampling. Recently, Mahmoodi et al.³⁹ presented a design, shown in Fig. 8, that includes in-pixel decimation.

Figure 8.

A true ΔΣ ADC pixel, as shown, has both a modulator and decimator. The modulator oversamples and quantizes the ADC input, while shaping noise to high frequencies. The decimator filters the modulator signal and down-samples it to the Nyquist rate. In this schematic, a logarithmic sensor is shown, but linear sensors may also be used.

Without in-pixel decimation, the bandwidth required to read the modulator outputs of a large array of pixels may be very high. As a result, either frame size, frame rate, or oversampling ratio has to be compromised. Lowering the oversampling ratio reduces the noise filtering and degrades the accuracy of the ΔΣ ADC. On the other hand, with in-pixel decimation, a large number of transistors are needed per pixel, which results in larger pixels. While this is acceptable for invisible-band applications, further efforts to shrink the in-pixel ΔΣ ADC are needed to apply the technology to visible-band applications competitively.