Hardware-based artificial neural networks for size, weight, and power constrained platforms

B. T. Wysocki; N. R. McDonald; C. D. Thiem

doi:10.1117/12.2052440

22 May 2014 Hardware-based artificial neural networks for size, weight, and power constrained platforms

B. T. Wysocki, N. R. McDonald, C. D. Thiem

Proceedings Volume 9119, Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII; 911909 (2014) https://doi.org/10.1117/12.2052440
Event: SPIE Sensing Technology + Applications, 2014, Baltimore, MD, United States

Abstract

A fully parallel, silicon-based artificial neural network (CM1K) built on zero instruction set computer (ZISC) technology was used for change detection and object identification in video data. Fundamental pattern recognition capabilities were demonstrated with reduced neuron numbers utilizing only a few, or in some cases one, neuron per category. This simplified approach was used to validate the utility of few neuron networks for use in applications that necessitate severe size, weight, and power (SWaP) restrictions. The limited resource requirements and massively parallel nature of hardware-based artificial neural networks (ANNs) make them superior to many software approaches in resource limited systems, such as micro-UAVs, mobile sensor platforms, and pocket-sized robots.

Citation Download Citation

B. T. Wysocki, N. R. McDonald, and C. D. Thiem "Hardware-based artificial neural networks for size, weight, and power constrained platforms", Proc. SPIE 9119, Machine Intelligence and Bio-inspired Computation: Theory and Applications VIII, 911909 (22 May 2014); https://doi.org/10.1117/12.2052440

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