1.1.

What Are Nanosheets?

Nanosheets fall in the family of gate-all-around (GAA) devices, which had been studied in the industry for decades.⁷ A predecessor of nanosheets—nanowires—are also a topic of study,⁸ but nanosheets have proven superior in many critical aspects and gained most of the attention in this device category. As shown in Fig. 1, all three architectures feature a Si interior (pink) surrounded by a conformal combination of an interlayer dielectric film and an HK film. FinFETs have three free surface planes which are surrounded by the gate when it is patterned perpendicular to the fins. Nanowires, shown in the center graphic, generally have a small volume relative to the surface area and are surrounded by the gate on all four sides of each wire. Nanosheets extend these two concepts into rectangular sheets that are stacked vertically, increasing the available surface area and the channel width.

Fig. 1

Comparison of dimensional elements for (a) FinFET, (b) nanowire, and (c) nanosheet devices.⁹

The optimal number of sheets for a GAA device has been broadly accepted in the industry at three sheets, and one of the most cited papers on the topic was by Lauer and colleagues in 2015.¹⁰ Their study shows that increasing from one-stack to two-stack has a significant gain ($>35\%$) in performance, while an increase from a two-stack to three-stack arrangement does improve, but by much less ($\sim 10\%$). Not only does increasing the number of sheet stacks show diminishing returns, but it also increases the process complexity, which would require further engineering development.

Another component of Lauer’s 2015 data speaks to the impact of the wire dimensional scaling ($D_{\text{wire}}$) on performance, with a key message being that no matter the sheet stack, improved electrostatics come at larger fin widths.¹⁰ This is also validated by Kim et al.,⁹ whose results compare the frequency achieved by finFETs and nanowires of varying heights ($H_{\text{fin}}/T_{\text{wire}}$) as they scale dimensionally ($D_{\text{fin}}/D_{\text{sheet}}$). Like Lauer’s results, at the smallest fin dimensions, finFETs perform better, while nanowires improve at wider widths ($D_{\text{sheet}}$). Owing to these width-driven improvements, nanosheets had overtaken the nanowire which is fundamentally narrower. An advantage of nanosheets is that the three-dimensional nature provides a wider parameter space (lateral sheet dimensions and thickness) to tailor the transistors for a broad range of performances. Kim et al.’s work shows that at increasing fin widths, the spread in the sheet height performance increases, and the best performance is achieved with thinner sheets at wider dimensions.

3.1.

Nanosheet Stack Formation

In the initial steps, when the thin crystalline Si and SiGe sheets are being grown epitaxially, wafers are still unpatterned. The critical measurements of interest are the individual layer thicknesses and the Ge concentrations for each of the SiGe sheets. Additionally, characterization of the thin film and interface quality, as well as defect density, are desired. Monitoring and controlling thickness, composition, and crystal quality down to the atomic scale are key for optimum device performance since the alternating multilayer film stack will define channel dimensions and electrical characteristics.

Non-destructive in-line characterization of individual sheet thicknesses in addition to Ge contents can be achieved by high-resolution x-ray diffraction (HRXRD) $\omega \text{–}2\theta$ scans around the (004) Bragg reflection, for example. Additionally, asymmetric (113) reciprocal space maps (RSMs) can be acquired to confirm pseudomorphic growth of the SiGe sheets. One of the main disadvantages of the HRXRD measurements is the acquisition time, which limits economical in-line metrology of $\omega \text{–}2\theta$ scans to only very few locations per wafer. Moreover, the acquisition of RSMs can take hours per location and hence is not a suitable monitoring technique for a manufacturing line. Therefore, a faster solution is desired that allows for dense across wafer sampling. Optical metrology techniques such as ellipsometry and scatterometry have the required speed but optical models must be developed that can account accurately for Ge content and thickness, and are robust enough to avoid parameter correlations between individual layers.^21,22 Depending on the complexity of the multilayer stack, this can become very difficult, particularly, if minute strain variations affect the dielectric functions and interface effects contribute to the optical response. To get started with dense and rapid in-line metrology, an optical technique that is not sheet-specific but yields good results may be set up with much less effort (Fig. 4). The recent introduction of in-line Raman spectroscopy enables a fast and accurate measurement of the Ge composition and allows direct access to the strain of the SiGe layers.¹² Both parameters can be independently determined based on the energy positions of the Si-Si and Si-Ge optic phonon modes, for example. However, a depth-dependence response is difficult to obtain. Here, a hybrid approach or optical metrology in conjunction with machine learning is a possible path to accurate sheet-specific and fast in-line metrology.

Fig. 4

Comparing scatterometry and XRD measurements for total nanosheet stack height show that both techniques can complete this measurement though scatterometry is less sensitive.²¹

As nanosheet technology continues to mature and finer process adjustments are made to further improve device performance, more advanced characterization may be required. Even a very small defect density effects, the crystalline quality will impact carrier mobility and thus device performance. Dislocation etches can be used to determine defect densities but are cumbersome.²³ Further studies are needed to determine the sensitivity of in-line techniques to crystalline dislocation defects, which may have rare occurrences. Other destructive techniques such as scanning transmission electron microscopy (STEM) and precession electron diffraction can serve as reference techniques to characterize individual layer thicknesses, SiGe strain, SiGe composition, and interface quality.¹⁹ Additionally, the rate of Ge diffusion from the SiGe sheets into the Si sheets with processing temperatures is challenging but must be understood. Secondary ion mass spectrometry (SIMS) has historically been a standard offline metrology option for composition profiling through a stack, and a paper by Mertens et al.²⁴ shows the diffusion of Ge via SIMS profiles and high-angle annular dark-field STEM. Bringing SIMS to the suite of in-line options for nanosheet stack monitoring may be necessary as further refinements and controls are required. Then as patterning begins, strain and composition may evolve so methods that are capable of measuring both blanket and patterned structures, such as Raman spectroscopy, are highly beneficial.

3.2.

Fin Patterning

While the key message in the previous section was focused on individual sheet thicknesses, once patterning begins, the target shifts to individual sheet widths. Traditional top-down critical dimension scanning electron microscopy (CDSEM) continues to be broadly leveraged at all process steps, particularly during patterning, and plays a key role in being a fast, flexible measurement. A challenge is that the bottom width is no longer the only critical dimension (CD) to be captured, and CDSEM likely cannot provide the individual sheet widths which vary due to the fin’s sidewall profile, without some additional enhancements. Perhaps through a combination of hybrid metrology, tilted SEM, and advanced algorithms or imaging, all of which could help expand visibility to sidewalls, CDSEM could be able to continue expanding into the three-dimensional space. This is an area where further exploration and calibration are needed. Scatterometry, also known as optical critical dimension (OCD) metrology, can also be employed to model the entire fin geometry at this step,¹⁹ though the correlations between the repeating Si and SiGe sheets may also be an issue for sheet-specific measurements post patterning. Depending on the development stage, the optical model may require either some simplifications, assumptions, or input from other techniques to develop a hybrid solution. Atomic force microscopy has been shown capable of characterizing complex features at decreasing nodes²⁵ through continued development of new scan modes and could serve as reference metrology for faster model-based techniques. However, sheet-differentiation along the sidewall for sheet-specific width extraction is currently out of reach for this technique.

Two other critical measurements of this nanosheet patterning step are the LER and LWR,²⁶ as these will increase local variation in sheet widths. LER and LWR have been derived historically from a CDSEM-based measurement, with power-spectral density (PSD) analysis providing a set of parameters to describe the frequency domains and edge characteristics.²⁷ In recent years, the concept of unbiased LER/LWR²⁸ as a more accurate measurement of line roughness has been adopted across the industry, as well.

Increased attention to line roughness has improved the available analyses and industry alignment, but sidewall roughness (SWR) continues to be less frequently studied, perhaps because there is no straightforward method for sidewall characterization. SWR may impact LER, where surfaces are very rough, especially given the known weakness of CDSEM metrology for undercut profiles. But to date, no methodology has been developed to decouple the two contributions. Kizu et al.²⁹ presented an AFM-based method for PSD LER extraction for sidewalls, and Fig. 5(a) is a three-dimensional representation of the AFM scans derived from scanning parallel to the sample to acquire the sidewall surface profiles for PSD analysis. The method was not available as an in-line technique and was also demonstrated on features larger than typically required for nanosheet devices, such that this method would be difficult to translate to relevant product dimensions.

Fig. 5

(a) AFM sidewall profile image developed from scanning the probe parallel to the line for PSD characterization of the sidewall edge roughness.²⁹ (b) Nanosheet technology’s migration to EUV drives smaller dimensions and more challenging AFM metrology. The yellow image (i) is an AFM three-dimensional scan of EUV resist, also shown in the top-down SEM image (ii). The AFM scan is accomplished with the probe shown in (iv).³⁰

For resist characterization, results from Schmidt et al.³⁰ showed that AFM may be able to differentiate sidewall profiles well enough without operating in CD-AFM mode where profiles are more tapered. Scans use a very thin AFM probe to characterize this resist and generate three-dimensional plots of the data, shown in Fig. 5(b). Critical dimension small-angle x-ray scattering (CDSAXS), a type of transmission SAXS, may be able to provide some sensitivity to SWR, but currently, there is no good reference metrology. There are also challenges to bringing CDSAXS in line with product-friendly specifications, specifically for throughput, signal-to-noise ratios, and spot sizes that allow for patterned wafer measurement pads.

Tied to the CD and LER/LWR measurements are some other process monitoring methods. Local CD uniformity (LCDU) also needs to be considered during fin module metrology discussions, as patterning considers shifting from optical lithography to EUV.¹⁸ Direct EUV-printed fins expand the design space, and while not quite a technical challenge, this drives more metrology which adds both time and cost to any learning cycle. LCDU is typically an aggregation of CDSEM measurements, but recent papers by Kong et al.³¹ and Schmidt et al.³² have shown that LCDU and LER may be extracted by scatterometry in conjunction with machine learning approaches. Figure 6 shows that LCDU results are very well matched and with a tight distribution, through different resists and process stages, for both CDSEM and scatterometry-based techniques. LCDU characterization by scatterometry could improve the time and cost of in-line monitoring, especially when coupled with the more traditional measurements for geometric parameters mentioned above. For process flows with multi-patterning solutions instead of EUV, pitch walk metrology solutions that were popularized for the finFET node will need to be revisited for nanosheet fins.³³

Fig. 6

Comparison of LCDU for post lithography and post etch via using two different resists. The chart compares data obtained by machine learning-assisted scatterometry and traditional CDSEM metrology.³¹

3.3.

Dummy Gate, Spacer, and Inner Spacer

Measurements surrounding the gate patterning and spacer/inner spacer modules will have many of the same challenges as fin patterning—CD, roughness (line and sidewall), and LCDU. Through all these steps, the tall dummy gate is present, which for tight gate pitches increases the challenge for any technique that requires line of sight or is limited to surface-level characterization. When EUV is used for direct gate patterning rather than self-aligned double patterning or self-aligned quadruple patterning (SAQP), more metrology time is required to fully characterize all variations within the relevant design space. Profile variability can also become more prominent as the feature space broadens. Figure 7 from Seshadri et al.²⁶ shows an example, with the undercut narrow lines on the left, while the wider aspect ratio features on the right have more consistent vertical sidewalls. Top-down techniques like CDSEM are generally blind to this effect, so a broad sampling plan is possible but likely would not be sensitive to this kind of variation. Model-based metrology techniques like scatterometry need to anticipate the profile change in the model to parameterize accordingly and have enough models with varying designs to capture the change through a pitch.

Fig. 7

TEM cross-sections of features with different line aspect ratios that were patterned at the same EUV lithography step. The three images show profile variation can occur due to etch effects from wider EUV-enabled aspect ratio ranges: (a) sub-50 nm pitch and (b and c) $>100\mathrm{nm}$ pitch.²⁶

Fig. 8

(a) CDSAXS intensity fringes can be translated to different nanowire indent depths and show sensitivity to etch variations in nanowire test structures.³⁴ (b) The difference in Ge counts measured by XRF before and after the inner spacer etch correlates to the indent depth. By coupling XRF as a reference data set with scatterometry data, a machine learning model can be trained. The chart shows the ML model tracks well with XRF.³⁶

Fig. 9

(a) Epi nodules can form anywhere within the trench between dummy gates or on top of the dummy gates, as shown in the TEM image. (b) Using top-down SEM imaging to calculate defect density as reference metrology for a machine learning model, scatterometry can be used to measure the defect density.³⁸

Fig. 10

(a) A set of AFM line scans from a top-down perspective, where the lighter color in the center represents the epi-filled trenches and the darker outside are the non-epi trench regions; the light vertical line features are the dummy gates. (b) and (c) AFM line scans extracted from the device regions with epi are shown. The line scans show examples of high and low epi variation, with zoomed-in clips from the epi surface.¹⁶

Fig. 11

(a) Schematic illustrates where residues may remain after the sacrificial sheets are removed. (b) A correlation plot of Ge residue from hybrid OCD and XRF metrology, which can then enable a model-based readout of where the residues are located.⁴⁰

Fig. 12

Detecting voltage contrast during SEM imaging for a two-sheet nanosheet structure can identify shorts between nanowires and S/D epi. (a) Example SEM image with contrast varying for the sheets and (b) corresponding cross-section of sheets showing connected (C) and not connected (NC) sheets.⁴²

Indent characterization for the sacrificial SiGe sheets has drawn a majority of metrology discussion at this part of the flow due to its role in setting device parameters and the impact that many of the other parameters discussed to this point have on the process. Due to the complexity of the resulting structure, model-based techniques can have dozens of material and geometric parameters to solve for, which can make both a robust and very flexible parameter set challenging. However, this is perhaps the most critical step for sheet-specific metrology, as each sheet dimension impacts the performance of the device and deviations can induce a variety of failures at subsequent processing steps.

There have been several published studies on the ability of techniques like scatterometry and CDSAXS to solve for the average indent depth. Korde et al.³⁴ show CDSAXS is capable of distinguishing indent depth and profile for a nanowire test structure through the indent and inner spacer steps [Fig. 8(a)]. The SAXS beamline at the Argonne National Lab was used for this study, and previous work was performed by a team using the same beamline to explore advancements required for in-line sources leveraging finFET geometries.³⁵ There is, however, no published work thus far showing the capability of existing in-line SAXS systems to solve for these kinds of nanosheet applications. Scatterometry accounts for a majority of the in-line results on indent monitoring. Kong et al.³⁶ describe a hybrid solution combining Ge counts from low-energy x-ray fluorescence (LE-XRF) with scatterometry to develop a machine learning (ML) solution for indent monitoring, which was shown to be sensitive to different etch conditions [Fig. 8(b)]. Building on this, Schmidt et al.³⁷ show a pathway to sheet-specific indent measurements using a combination of spectral interferometry, which leverages scatterometry, and XRF counts. More development in this area is expected, given the importance of sheet-specific characterization.

After the SiGe sheets are indented, the conformal inner spacer is deposited which fills the indent and then is trimmed back so only the Si sheets are exposed on the sidewall in the nanosheet region. Monitoring the inner spacer width and coverage on the dummy gate is important for multiple reasons. Once an ideal indent is achieved, as discussed in the previous paragraph, the inner spacer needs to fully fill this indent to ensure the gate length after channel release. The only existing in-line option to characterize the spacer width and coverage on device-like structures is a scatterometry-based model that is flexible enough to capture the possibilities for variation. As the indent step was already challenging enough, there may be a possibility to fix some of the variables using the prior measurement results in a feed-forward manner. Or a hybrid metrology approach might reduce the parameter space, for example using XRF to solve for Ge count difference and relying on scatterometry to map counts to indent depth plus interpret the rest of the structure. These are possibilities based on the published work for different metrology solution methods, but applying these strategies to these specific structures would require development and validation.

3.4.

Epi Growth

Patterned epi nucleation and growth can be a difficult step to monitor, as it has many more variables compared to a spacer deposition or other non-patterning steps. Here, epi is intended to be nucleating selectively on the exposed Si sheets only, then growing and merging to fill the trench entirely. Shifts in the epi process that change the growth rates or behavior or unintended epi growth on random nucleation need to be captured in metrology solutions.

There have been a few metrology studies presented addressing some areas of consideration for this module. Kong et al.³⁸ described methods to characterize the density of epi defects called “nodules” and to localize them along with the height of the dummy gate [Fig. 9(a)], which can help identify the root cause of the defect. These solutions required a combination of CDSEM, scatterometry, and machine learning to achieve these two results, but Fig. 9(b) shows the power of hybrid metrology to achieve a measurement that was previously qualitatively attained through offline cross-section characterization.

An AFM-based study by Breton et al. focused on the epi height characterization and merge quality.¹⁶ Average epi height may be determined via scatterometry on metrology macros or device regions that are larger than the spot size, but variations in the epi height and local measurements on device macros would not be possible. Tilt SEM may provide some visibility to the variation, and future work may show a path to utilize this capability for epi height monitoring. For direct measurement of the epi height, AFM offers a path forward, as shown in Fig. 10. Patterns with trenches larger than 50 nm are easily characterized by existing AFM probes and methods, but on-device measurements require innovation as trench dimensions shrink below probe widths and maintain a relatively high aspect ratio. While this applies to earlier patterning stages for nanosheets as well, the epi module is where this demonstrated capability may be most beneficial. By characterizing the variation of the height, the measurement can also provide feedback on the epi merge quality, another important metric for this module.

A remaining metrology challenge for epi growth is identifying when all the nanosheet sheets are not fully connected, through incomplete nucleation or growth. Height monitoring may catch when the top sheet is not connected, but the bottom sheet’s connectivity is hidden from any top-down techniques and essentially there is a void at the bottom of the trench. Previous work has been completed with machine learning and a hybrid solution of scatterometry and XRF to detect voids in metal lines,³⁹ but a related epi-stage solution has not been published, to the authors’ knowledge. A similar machine learning model with extensive reference metrology would be required to develop a qualitative readout (i.e., some defectivity vs. widespread defectivity), and the eventual solution will continue to blur the line between defect inspection and metrology.

3.5.

Channel Release

The sacrificial SiGe sheets are finally etched during the channel release module, and as previously discussed, this step requires metrology to both identify when SiGe is not completely removed and also to flag when the suspended Si sheets sag due to mechanical instability or stiction. It is also possible the etch could alter the sheet dimensions, so the sheet thickness after removal is the third measurement of interest. Scatterometry again has a large role and must be sensitive to both the resulting geometry of the cavity and any remaining Ge. As the unit cell geometry is still very complex, Muthinti et al.⁴⁰ demonstrated that continued use of machine learning and reference metrologies like XRF may be required to develop a robust solution for residue localization and characterization at this step (Fig. 11). While strain metrology was not identified particularly in earlier sections, it would be especially important at channel release to monitor how the strain has evolved after removing the SiGe sheets via Raman metrology.^12,41

In the epi section, it was stated that bottom sheet connectivity to epi is a gap for metrology/defect inspection solutions currently. After channel release, the connectivity can now be looked at directly through the sheets, rather than the epi. A prior study shows some opportunity via a classic defect detection method, voltage contrast, to identify when top sheets are not fully connected,⁴² but it still has the same top-down challenge where bottom sheet visibility is obscured. By filtering out secondary electrons below the energy spectrum peak in the SEM signal, the contrast change can indicate when the top sheet is not connected, as shown in Fig. 12. Perhaps a future method where tilt SEM⁴³ is combined with voltage contrast would provide visibility to each sheet’s connectivity. This could also potentially point to broken sheets, as they would no longer be connected, but voltage contrast would likely not have sensitivity to sagging sheets, which would still retain the connection to the S/D epi.

Detecting sagging sheets is still an open metrology challenge, which currently is best identified through the cross-section. The hybrid AFM scan and CDSEM image of sagging sheets in Fig. 13 were completed on a cross-sectioned and flipped nanowire,¹⁷ so in-line methods to do the same analysis are still in need. Through the pairing of reference cross-sections and machine learning, perhaps some very small signals can be detected from optical or x-ray-based techniques which could point to stiction or mechanical failures. This is another case where sheet-specific results may be necessary.

Fig. 13

Image formed by overlaying an AFM topographic scan (colored outer regions) and CDSEM tilted SEM image (center grayscale region) of the same cross-sectioned nanowire structure to detect and measure wire buckling.¹⁷

3.6.

Replacement Metal Gate

The last nanosheet-specific module before entering MOL and back-end processing is the RMG module. It is defined by the deposition of multiple thin-film materials, which are conformal to the Si sheets and the other exposed surfaces. These film thicknesses are on the order of angstroms to single nanometers, so a highly sensitive and accurate measurement is required, and this needs to be applied to all dimensions to characterize the top, bottom, and sidewall thicknesses. Device performance would be compromised when a given film is so thick as to merge in the channel and prevent another film from wrapping around each sheet. A scatterometry solution may be capable of a single-step measurement, but a more robust solution may be reached by combining scatterometry with a technique like an x-ray photoelectron spectroscopy (XPS). In a study by Vaid et al.,⁴⁴ hybrid metrology utilizing XPS’s angstrom-level sensitivity and scatterometry’s geometric strengths to characterize a conformal thin film over fin structures with varying aspect ratios. Figure 14 shows the improvements in accuracy for the patterned fin structure using the hybrid solution over XPS alone, relative to a reference XPS dataset on a planar target.

Fig. 14

Robust three-dimensional thin films metrology requires XPS hybridization with a geometry-focused technique to resolve angstrom scale sensitivity on non-planar structures.⁴⁴

3.7.

Module Review: Metrology Capabilities and Needs

The current best-known metrology methods and challenges per module have been described in the prior subsections, and Table 1 consolidates that review. Future metrology needs point to improvements in throughput and sensitivity, support for increasingly small dimensions, and more reference metrology. There is also a general need for new methods for process monitoring to be in-line and non-destructive. Specifically, improvements with regard to sheet-specific characterizations are required throughout the FEOL processing steps.

Table 1

Current metrology solutions and future non-destructive needs by module.