Poster + Presentation + Paper
22 February 2021 Investigation and optimization of STI dry-etch induced overlay through patterned wafer geometry tool
Tsu-Wen Huang, Ying-Cheng Chuang, Hsuan-Jui Huang, Chung-Chang Liu, Hsiao-Lun Chu, Sheng-Yu Chen, Ming-Ju Li, Jun-Eu Tang, Chiou-Shoei Chee, Choon-Wai Chang, Tung-Ying Lee
Author Affiliations +
Conference Poster
Abstract
When a novel dry-etch tool was introduced for the shallow trench isolation (STI) process, it resulted in poorer overlay performance downstream. The patterned wafer geometry (PWG™) tool was utilized to investigate the observed difference in results between the new tool and the POR tool. By using metrics representing process-induced local shape and/or stress, a post-STI oxide fill rapid thermal process (RTP) was identified as the process step where the difference between the dry-etch tools was magnified. An experiment based on RTP temperature and ramp rate was conducted and the effect was evaluated using both GEN4–a predicted shape overlay metric derived from PWG shape measurement–and overlay measurements. Both GEN4 and overlay results indicated that high RTP temperature and low ramp rate could compensate for the process effects introduced by the new etch tool. The strong correlation between GEN4 and overlay also suggested that GEN4 may be a suitable upstream predictor of process-induced overlay excursion in such a case.
Conference Presentation
© (2021) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tsu-Wen Huang, Ying-Cheng Chuang, Hsuan-Jui Huang, Chung-Chang Liu, Hsiao-Lun Chu, Sheng-Yu Chen, Ming-Ju Li, Jun-Eu Tang, Chiou-Shoei Chee, Choon-Wai Chang, and Tung-Ying Lee "Investigation and optimization of STI dry-etch induced overlay through patterned wafer geometry tool", Proc. SPIE 11611, Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV, 1161139 (22 February 2021); https://doi.org/10.1117/12.2584589
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