High-performance circuit design for the RET-enabled 65-nm technology node

Lars W. Liebmann; Arnold E. Barish; Zachary Baum; Henry A. Bonges; Scott J. Bukofsky; Carlos A. Fonseca; Scott D. Halle; Gregory A. Northrop; Steven L. Runyon; Leon Sigal

doi:10.1117/12.538242

3 May 2004 High-performance circuit design for the RET-enabled 65-nm technology node

Lars W. Liebmann, Arnold E. Barish, Zachary Baum, Henry A. Bonges, Scott J. Bukofsky, Carlos A. Fonseca, Scott D. Halle, Gregory A. Northrop, Steven L. Runyon, Leon Sigal

Author Affiliations +

Proceedings Volume 5379, Design and Process Integration for Microelectronic Manufacturing II; (2004) https://doi.org/10.1117/12.538242
Event: Microlithography 2004, 2004, Santa Clara, California, United States

Abstract

The implementation of alternating phase shifted mask lithography for the poly-conductor level of IBM's leading edge 65nm microprocessor is described. Very broad and 'resolution-enhancement-technology generic' design rules, referred to as radical design restrictions, are demonstrated to be key enablers of alternating phase shifted mask design. The benefit of these radical design restrictions over conventional design rules and other alternating phase shifted mask design approaches is detailed for key aspects of the design flow.

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Lars W. Liebmann, Arnold E. Barish, Zachary Baum, Henry A. Bonges, Scott J. Bukofsky, Carlos A. Fonseca, Scott D. Halle, Gregory A. Northrop, Steven L. Runyon, and Leon Sigal "High-performance circuit design for the RET-enabled 65-nm technology node", Proc. SPIE 5379, Design and Process Integration for Microelectronic Manufacturing II, (3 May 2004); https://doi.org/10.1117/12.538242

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