Paper
26 March 2011 Printability and inspectability of defects on the EUV mask for sub-32nm half pitch HVM application
Author Affiliations +
Abstract
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography (EUVL) into high volume manufacturing, yet little data is available for understanding native defects on real masks. In this paper, a full field EUV mask is fabricated to see the printability of various defects on the mask. Programmed pit defect shows that minimum printable size of pits could be 17 nm of SEVD from the AIT. However 23.1nm in SEVD is printable from the EUV ADT. Defect printability and identification of its source along from blank fabrication to mask fabrication were studied using various inspection tools. Capture ratio of smallest printable defects was improved to 80% using optimized stack of metrical on wafer and state-of-art wafer inspection tool. Requirement of defect mitigation technology using fiducial mark are defined.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sungmin Huh, In-Yong Kang, Sang-Hyun Kim, Hwan-seok Seo, Dongwan Kim, Jooon Park, Seong-Sue Kim, Han-Ku Cho, Kenneth Goldberg, Iacopo Mochi, Tsutomu Shoki, and Gregg Inderhees "Printability and inspectability of defects on the EUV mask for sub-32nm half pitch HVM application", Proc. SPIE 7969, Extreme Ultraviolet (EUV) Lithography II, 796902 (26 March 2011); https://doi.org/10.1117/12.879384
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Inspection

Photomasks

Extreme ultraviolet

Wafer inspection

Semiconducting wafers

Defect detection

Defect inspection

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