During the past years, the processor-memory performance gap, also known as “Memory Wall” problem, has forced designers to allocate more than 50% of the chip real-estate for caching purposes to alleviate limited memory bandwidth. Optical technology holds the credentials of delivering high-bandwidth and energy-efficient photonic integrated memories that could revisit the traditional computing architectures. The migration, however, to fully functional and practical optical RAMs will require the exploitation of wavelength dimension as well as seamless cooperation between storage and peripheral decoding units, for efficient RAM architectural layouts. In this paper we present the first demonstration of an all-optical 8-bit RAM storage unit comprising WDM-enabled 2×4 Row and 1×4 Column Decoders and a 2×4-bit optical RAM Bank for storing a 20Gb/s 4-bit WDM-formatted optical data word per row. The proposed scheme incorporates a shared multi-λ SOA-MZI Access Gate (AG) per Word Line (WL) for granting access-control to the appropriate word line, WL “00” or WL “01”, and a passive Column Decoder that directs the incoming WDM-formatted data words to the respective RAM cells. Each RAM cell is in turn based on an elementary monolithically integrated InP photonic Flip-Flop (FF). The proposed architecture is experimentally verified for successful Write operation of a 4-bit WDM word to a selected 4-bit RAM row at 20Gb/s RAM throughput and a peak power penalty within the range of [7.8-10.7] dB, promising a 4× speed-up in memory-access throughput and paving the way for high-bandwidth multi-bit optical RAM-architectures that may relax the memory-bottleneck of computing architectures.
Optical Random Access Memories (RAMs) have been conceived as high-bandwidth alternatives of their electronic counterparts, raising expectations for ultra-fast operation that can resolve the ns-long electronic RAM access bottleneck. In addition, with electronic Address Look-Up tables operating still at speeds of only up to 1 GHz, the constant increase in optical switch i/o data rates will yield severe latency and energy overhead during forwarding operations. In this invited paper, we present an overview of our recent research, introducing an all-optical RAM cell that performs both Write and Read functionalities at 10Gb/s, reporting on a 100% speed increase compared to state-of-the-art optical/electrical RAM demonstrations. Moreover, we present an all-optical Ternary-CAM cell that operates again at 10 Gb/s, doubling the speed of the fastest optical/electrical CAMs so far. To achieve this, we utilized a monolithically integrated InP optical Flip-Flop and a Semiconductor Optical Amplifier-Mach-Zehnder Interferometer (SOA-MZI) operating as an Access Gate to the RAM, and as an XOR gate to the T-CAM. These two demonstrations pave the way towards the vision of integrated photonic look-up memory architectures in order to relieve the memory bottlenecks.
KEYWORDS: Antennas, Modulation, Analog electronics, Single mode fibers, Avalanche photodetectors, Wireless communications, Radio over Fiber, Radio optics, Clocks, Signal to noise ratio
An IFoF/V-band link is experimentally presented in a 100MBd QPSK downlink transmission across 7km fiber by a high-power EML and over-the-air by 60GHz beamforming antenna with 32-radiating elements, comprising the first demonstration of a cost-effective end-to-end directional Fiber-Wireless link for dense 5G millimeter-wave networks.
KEYWORDS: Eye, Signal attenuation, Signal processing, Data conversion, Modulators, Optical filters, Bandpass filters, Amplitude modulation, Information science, Network architectures
The 5G-induced paradigm shift from traditional macro-cell networks towards ultra-dense deployment of small cells, imposes stringent bandwidth and latency requirements in the underlying network infrastructure. While state of the art TDM-PON e.g. 10G-EPON, have already transformed the fronthaul networks from circuit switched point-to-point links into packet based architectures of shared point-to-multipoint links, the 5G Ethernet-based fronthaul brings new requirements in terms of latency for an inherently bursty traffic. This is expected to promote the deployment of a whole new class of optical devices that can perform with burst-mode traffic while realizing routing functionalities at a low-latency and energy envelope, avoiding in this way the latency burden associated with a complete optoelectronic Ethernet routing process and acting as a fast optical gateway for ultra-low latency requiring signals. Wavelength conversion can offer a reliable option for ultra-fast routing in access and fronthaul networks, provided, however, that it can at the same time offer both packet power-level equalization to account for differences in optical path losses and comply with the typical, in optical fronthauling, NRZ format. In this paper, we demonstrate an optical Burst-Mode Wavelength Converter using a Differentially-Biased SOA-MZI that operates in the deeply saturated regime to provide optical output power equalization for different input signal powers. The device has been experimentally validated for 10Gb/s NRZ optical packets, providing error-free operation for an input packet peak-power dynamic range of more than 9dB.
Analog optical fronthaul for 5G network architectures is currently being promoted as a bandwidth- and energy-efficient technology that can sustain the data-rate, latency and energy requirements of the emerging 5G era. This paper deals with a new optical fronthaul architecture that can effectively synergize optical transceiver, optical add/drop multiplexer and optical beamforming integrated photonics towards a DSP-assisted analog fronthaul for seamless and medium-transparent 5G small-cell networks. Its main application targets include dense and Hot-Spot Area networks, promoting the deployment of mmWave massive MIMO Remote Radio Heads (RRHs) that can offer wireless data-rates ranging from 25Gbps up to 400Gbps depending on the fronthaul technology employed. Small-cell access and resource allocation is ensured via a Medium-Transparent (MT-) MAC protocol that enables the transparent communication between the Central Office and the wireless end-users or the lamp-posts via roof-top-located V-band massive MIMO RRHs. The MTMAC is analysed in detail with simulation and analytical theoretical results being in good agreement and confirming its credentials to satisfy 5G network latency requirements by guaranteeing latency values lower than 1 ms for small- to midload conditions. Its extension towards supporting optical beamforming capabilities and mmWave massive MIMO antennas is discussed, while its performance is analysed for different fiber fronthaul link lengths and different optical channel capacities. Finally, different physical layer network architectures supporting the MT-MAC scheme are presented and adapted to different 5G use case scenarios, starting from PON-overlaid fronthaul solutions and gradually moving through Spatial Division Multiplexing up to Wavelength Division Multiplexing transport as the user density increases.
Programmable switching nodes supporting Software-Defined Networking (SDN) over optical interconnecting technologies arise as a key enabling technology for future disaggregated Data Center (DC) environments. The SDNenabling roadmap of intra-DC optical solutions is already a reality for rack-to-rack interconnects, with recent research reporting on interesting applications of programmable silicon photonic switching fabrics addressing board-to-board and even on-board applications. In this perspective, simplified information addressing schemes like Bloom filter (BF)-based labels emerge as a highly promising solution for ensuring rapid switch reconfiguration, following quickly the changes enforced in network size, network topology or even in content location. The benefits of BF-based forwarding have been so far successfully demonstrated in the Information-Centric Network (ICN) paradigm, while theoretical studies have also revealed the energy consumption and speed advantages when applied in DCs. In this paper we present for the first time a programmable 4x4 Silicon Photonic switch that supports SDN through the use of BF-labeled router ports. Our scheme significantly simplifies packet forwarding as it negates the need for large forwarding tables, allowing for its remote control through modifications in the assigned BF labels. We demonstrate 1x4 switch operation controlling the Si-Pho switch by a Stratix V FPGA module, which is responsible for processing the packet ID and correlating its destination with the appropriate BF-labeled outgoing port. DAC- and amplifier-less control of the carrier-injection Si-Pho switches is demonstrated, revealing successful switching of 10Gb/s data packets with BF-based forwarding information changes taking place at a time-scale that equals the duration of four consecutive packets.
Future broadband access networks in the 5G framework will need to be bilateral, exploiting both optical and wireless technologies. This paper deals with new approaches and synergies on radio-over-fiber (RoF) technologies and how those can be leveraged to seamlessly converge wireless technology for agility and mobility with passive optical networks (PON)-based backhauling. The proposed convergence paradigm is based upon a holistic network architecture mixing mm-wave wireless access with photonic integration, dynamic capacity allocation and network coding schemes to enable high bandwidth and low-latency fixed and 60GHz wireless personal area communications for gigabit rate per user, proposing and deploying on top a Medium-Transparent MAC (MT-MAC) protocol as a low-latency bandwidth allocation mechanism. We have evaluated alternative network topologies between the central office (CO) and the access point module (APM) for data rates up to 2.5 Gb/s and SC frequencies up to 60 GHz. Optical network coding is demonstrated for SCM-based signaling to enhance bandwidth utilization and facilitate optical-wireless convergence in 5G applications, reporting medium-transparent network coding directly at the physical layer between end-users communicating over a RoF infrastructure. Towards equipping the physical layer with the appropriate agility to support MT-MAC protocols, a monolithic InP-based Remote Antenna Unit optoelectronic PIC interface is shown that ensures control over the optical resource allocation assisting at the same time broadband wireless service. Finally, the MT-MAC protocol is analysed and simulation and analytical theoretical results are presented that are found to be in good agreement confirming latency values lower than 1msec for small- to mid-load conditions.
At the dawning of the exaflop era, High Performance Computers are foreseen to exploit integrated all-optical elements, to overcome the speed limitations imposed by electronic counterparts. Drawing from the well-known Memory Wall limitation, imposing a performance gap between processor and memory speeds, research has focused on developing ultra-fast latching devices and all-optical memory elements capable of delivering buffering and switching functionalities at unprecedented bit-rates. Following the master-slave configuration of electronic Flip-Flops, coupled SOA-MZI based switches have been theoretically investigated to exceed 40 Gb/s operation, provided a short coupling waveguide. However, this flip-flop architecture has been only hybridly integrated with silica-on-silicon integration technology exhibiting a total footprint of 45x12 mm2 and intra-Flip-Flop coupling waveguide of 2.5cm, limited at 5 Gb/s operation. Monolithic integration offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity towards, bearing promises for fast all-optical memories. Here, we present for the first time a monolithically integrated all-optical SR Flip-Flop with coupled master-slave SOA-MZI switches. The photonic chip is integrated on a 6x2 mm2 die as a part of a multi-project wafer run using library based components of a generic InP platform, fiber-pigtailed and fully packaged on a temperature controlled ceramic submount module with electrical contacts. The intra Flip-Flop coupling waveguide is 5 mm long, reducing the total footprint by two orders of magnitude. Successful flip flop functionality is evaluated at 10 Gb/s with clear open eye diagram, achieving error free operation with a power penalty of 4dB.
A time-domain solver for the response of a Semiconductor Optical Amplifier (SOA) relying on multigrid numerical techniques and a wideband steady state material gain coefficient is presented for the first time. Multigrid techniques enable the efficient solution of implicit time discretization schemes for the associated system of coupled differential equations, namely the carrier rate equation in the time domain and the signal amplification in the spatial domain, which in turn enable accuracy- instead of stability-restricted time-discretization of the signals. This allows lifting off the limitations of an equidistant spatio-temporal grid for the representation of the incoming signals adopted by traditional explicit SOA models, releasing an adaptive stepsize controlled solver for the dynamic SOA response with dense timesampling under a rapidly varying SOA signal output and scarce time-sampling when negligible changes are observed.
The processor-memory performance gap, commonly referred to as “Memory Wall” problem, owes to the speed mismatch between processor and electronic RAM clock frequencies, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In this article, we present our recent work spanning from Si-based integrated optical RAM cell architectures up to complete optical cache memory architectures for Chip Multiprocessor configurations. Moreover, we discuss on e/o router subsystems with up to Tb/s routing capacity for cache interconnection purposes within CMP configurations, currently pursued within the FP7 PhoxTrot project.
Silicon-photonic 2×2 electro-optical switching elements and modulators based on the carrier depletion mechanism using both dual-resonator and MZI layout configurations have been developed. The passive photonic structures were developed and optimized using a fast design-fabrication-characterization cycle. The main objective is to deliver smallfootprint, low-loss and low-energy silicon photonic electro-optical switching elements and modulators equipped with standard input-output grating couplers and radio-frequency electrical contact tips to allow their characterization in highspeed probe-station setups. The insertion losses, crosstalk, power consumption and BER performance will be addressed for each electro-optical structure. The fabrication steps, including low loss waveguide patterning, pn junction and low resistive ohmic contact formation have been optimized to produce high performance devices with relaxed fabrication tolerances, employing both optical and electron-beam lithography.
Optical RAM has emerged as a promising solution for overcoming the “Memory Wall” of electronics, indicating the use of light in RAM architectures as the approach towards enabling ps-regime memory access times. Taking a step further towards exploiting the unique wavelength properties of optical signals, we reveal new architectural perspectives in optical RAM structures by introducing WDM principles in the storage area. To this end, we demonstrate a novel SOAbased multi-wavelength Access Gate for utilization in a 4x4 WDM optical RAM bank architecture. The proposed multiwavelength Access Gate can simultaneously control random access to a 4-bit optical word, exploiting Cross-Gain-Modulation (XGM) to process 8 Bit and Bit channels encoded in 8 different wavelengths. It also suggests simpler optical RAM row architectures, allowing for the effective sharing of one multi-wavelength Access Gate for each row, substituting the eight AGs in the case of conventional optical RAM architectures. The scheme is shown to support 10Gbit/s operation for the incoming 4-bit data streams, with a power consumption of 15mW/Gbit/s. All 8 wavelength channels demonstrate error-free operation with a power penalty lower than 3 dB for all channels, compared to Back-to-Back measurements. The proposed optical RAM architecture reveals that exploiting the WDM capabilities of optical components can lead to RAM bank implementations with smarter column/row encoders/decoders, increased circuit simplicity, reduced number of active elements and associated power consumption. Moreover, exploitation of the wavelength entity can release significant potential towards reconfigurable optical cache mapping schemes when using the wavelength dimension for memory addressing.
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