Dr. David Fitrio Profile

Dr. David Fitrio

Research Student at La Trobe Univ

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Publications (4)

Proceedings Article | 7 December 2013 Paper

Effect of mesh element type of Finite Element Model (FEM) on unimorph cantilever vibration

H. Aris, D. Fitrio, J. Singh

Proceedings Volume 8923, 89234E (2013) https://doi.org/10.1117/12.2033617

KEYWORDS: Finite element methods, Microelectromechanical systems, Computer simulations, Electronic components, Strain analysis, Solar energy, Ferroelectric materials, Zinc oxide, Systems modeling, Piezoelectric effects

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Proceedings Article | 5 January 2006 Paper

Energy efficient low power shared-memory Fast Fourier Transform (FFT) processor with dynamic voltage scaling

D. Fitrio, J. Singh, A. Stojcevski

Proceedings Volume 6035, 60350A (2006) https://doi.org/10.1117/12.638354

KEYWORDS: Transistors, Clocks, Signal processing, Sensors, Logic, Fourier transforms, Power supplies, Telecommunications, Integrated circuit design, Switches

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Reduction of power dissipations in CMOS circuits needs to be addressed for portable battery devices. Selection of appropriate transistor library to minimise leakage current, implementation of low power design architectures, power management implementation, and the choice of chip packaging, all have impact on power dissipation and are important considerations in design and implementation of integrated circuits for low power applications. Energy-efficient architecture is highly desirable for battery operated systems, which operates in a wide variation of operating scenarios. Energy-efficient design aims to reconfigure its own architectures to scale down energy consumption depending upon the throughput and quality requirement. An energy efficient system should be able to decide its minimum power requirements by dynamically scaling its own operating frequency, supply voltage or the threshold voltage according to a variety of operating scenarios. The increasing product demand for application specific integrated circuit or processor for independent portable devices has influenced designers to implement dedicated processors with ultra low power requirements. One of these dedicated processors is a Fast Fourier Transform (FFT) processor, which is widely used in signal processing for numerous applications such as, wireless telecommunication and biomedical applications where the demand for extended battery life is extremely high. This paper presents the design and performance analysis of a low power shared memory FFT processor incorporating dynamic voltage scaling. Dynamic voltage scaling enables power supply scaling into various supply voltage levels. The concept behind the proposed solution is that if the speed of the main logic core can be adjusted according to input load or amount of processor's computation "just enough" to meet the requirement. The design was implemented using 0.12 μm ST-Microelectronic 6-metal layer CMOS dual- process technology in Cadence Analogue Environment.

Proceedings Article | 28 February 2005 Paper

Subthreshold leakage current reduction techniques for static random access memory

David Fitrio, Aleksandar Stojcevski, Jugdutt Singh

Proceedings Volume 5649, (2005) https://doi.org/10.1117/12.582332

KEYWORDS: Transistors, Amplifiers, Switches, Molybdenum, Capacitance, Logic, Power supplies, Clocks, Data modeling, Modeling

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Proceedings Article | 2 April 2004 Paper

MEMS components for front end of direct conversion receiver architecture

Vidyadhar Vibhute, David Fitrio, Aleksandar Stojcevski, Aladin Zayegh, Jugdutt Singh

Proceedings Volume 5276, (2004) https://doi.org/10.1117/12.530186

KEYWORDS: Microelectromechanical systems, Capacitors, Switches, Receivers, Oscillators, Homodyne detection, Molybdenum, Transistors, Interference (communication), Wireless communications

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