Devices engineered for slowing light, utilizing one-dimensional grating waveguides and fabricated from silicon nitride, often necessitate large footprints to secure the required delay, a consequence of the material’s inherently low refractive index. Our approach employs a genetic algorithm to optimize 100×100nm^2 etchings on a predetermined grating waveguide topology, allowing for either the selective guidance of peak pulse intensity of the output or the augmentation of true time delay within the identical unit length. Within the chosen predetermined topology, the optimal configuration was identified based on the properties of the signal excitation in the time domain. This approach significantly facilitates the application-specific selection of peak intensity decay rate and time delay behavior within a 1D grating waveguide system.
Integrated Optical Phased Arrays (OPAs) are important for various applications such as LIDAR, microscopy, wireless communication, and holography. Traditional one-dimensional N-element OPAs with individual phase shifters for varied steering angles often have emitter spacings that exceed half a wavelength, leading to grating lobes. Moreover, using true-time-delay lines with varied numbers of periods for different delays may cause amplitude inconsistencies and further side lobe elevation. The proposed Partially Apodised (PA) one-dimensional grating waveguide design controls amplitude while conserving the time delay for targeted steering angles, using distributions as Uniform to minimize grating and side lobes. We fabricated a four-element array with insertion losses of -3 dB for the PA version across the 1530-1580 nm wavelength band.
Bragg-Grating-Waveguide (BGW) delay lines are commonly used in transmission mode, owing to the significant elevation in group index observed at the edge of the stopband. However, achieving delays often necessitates structures with a larger footprint, such as cascaded or spiral designs, which consume a substantial amount of chip estate. Recent approaches to optimize chip space involve round-trip configurations with reflectors, but these can restrict bandwidth and cause mode conversion. Our study introduces an efficient solution: a meta-reflector for TE0 mode, enabling double delays via a single path, while also employing a step taper in TM0 mode to couple the TM signal into a strip waveguide, within a 1.9 × 2.6 μm2 area. Simulations show that in TE mode, there is a peak attenuation of -0.18 dB within the 1530–1590 nm wavelength spectrum, and in TM mode, the loss reaches -4.73 dB across the 1500–1600 nm band. In the computation of losses, the customary impact of the Bragg grating waveguide was disregarded, with attention concentrated exclusively on the design of the reflector.
The challenge of designing crossings in one-dimensional grating waveguides (1DGWs) arises from the noticeable asymmetry in Bloch mode profiles, which causes the guided modes to be compressed toward the outer sidewall. The proposed solution involves using digitized metamaterials in an extensively corrugated 1DGW on a silicon-on-insulator platform. The resulting crossing structure has an ultra-miniaturized and ultra-low loss design, with a broad bandwidth spanning from 1500 to 1580 nm, while maintaining a minimal footprint of merely 2.1×2.1 μm2. The fabricated device is found to have an insertion loss of -2.52 dB within the wavelength range of 1500 to 1580 nm. This design represents a significant advancement in the pursuit of compact and low-energy silicon photonic waveguide crossings.
The aim of this study is to investigate and design broadband, terahertz antennas for the time-domain, pulsed operation of the photoconductive sources and detectors. Different antenna types, i.e., thick dipole, bowtie, and spiral antenna, are designed, and their performances are analyzed both analytically and numerically for radiation in 0.8-2 THz band. A very effective ultra-wideband antenna configuration, Archimedean spiral antenna, which has promising time-domain radiation results according to analytical studies, is proposed for terahertz radiation. To the best of the authors’ knowledge, this is the first study on fully time-domain analysis of terahertz antennas operating in 0.8-2 THz band.
The competition to suggest high performance solutions for terahertz communication targets 0.22-0.32 THz band because of its bandwidth and attenuation advantages over other terahertz frequencies. However, the state-of-the-art suffers from conventional terahertz waveguide performance. Alternatively, the spoof surface plasmon polariton waveguides (SSPP WGs) measurements achieve the record-low insertion loss per unit length at 0.3 THz. On the other hand, the SSPP WGs require high performance transitions to interface with terahertz active devices such as transistors and diodes. In this paper, we present design, optimization, and experimental verification of high-performance coplanar waveguide-to-SSPP WG (CPW-to-SSPP WG) transitions at 0.25-0.3 THz band. The measurements show that the insertion loss of a CPW to SSPP WG transition can be suppressed up to -0.5 dB at the proposed frequency band.
The terahertz imaging systems bring the advantage of both optical and microwave frequency spectrums, thanks to the invasion capability of the terahertz waves through different media providing high-resolution imaging at real terahertz frequencies such as 1 THz. Nevertheless, the state-of-the-art terahertz technologies employ bulky optical system design approach. In consequence, the state-of-the-art terahertz systems are not suitable for high mobility terahertz imaging applications. On the other hand, the state-of-the-art terahertz integrated circuits (TICs) suffer from high attenuation due to conventional terahertz waveguides, and hence, a novel high-performance terahertz waveguide is needed. In this paper, we present the investigation of loss performance of spoof surface plasmon polariton (SSPP) waveguides (WGs) that operate at 1 THz, which will enable the demonstration of compact and high-performance TICs. We present a relationship between the corrugation dimensions, radiation, and metallic losses and guided wavenumber for the first time. The proposed SSPP WGs are able to transmit the terahertz wave in expense of an insertion loss of -4.93 dB through 250 µm at 1 THz.
The state-of-the-art terahertz systems employ conventional, bulky, optical system design approach that lags the miniaturization, high-density integration, and mobility of the terahertz imaging systems. On the other hand, the motivation for miniaturization of the terahertz systems using integrated circuits (ICs) is limited by the conventional terahertz waveguide performance that requires utilization of a novel waveguiding technology. The spoof surface plasmon polariton (SSPP) waveguide (WG) measurements have recently been reached the record low insertion loss per unit length performance among all planar terahertz WGs at 0.3 THz suggesting tremendous potential for demonstration of high-performance terahertz ICs. Nevertheless, the real potential of the terahertz imaging systems requires demonstration of an imaging system that can provide high-resolution feature extraction of the targets covered by obstacles at real-terahertz frequencies. We present the design and simulation of 135° spoof surface plasmon polariton (SSPP) bending circuits at 1 THz that are one of the most fundamental building blocks in novel IC technologies that will enable development of high-performance, high-resolution terahertz imaging systems along with the investigation of the coupling mechanism of the SSPP waves through non-aligned waveguide geometries that is mandatory for implementing standalone terahertz ICs.
The limited bandwidth of conventional phase-shifter-based antenna arrays, which is caused by steering in different angles at different frequencies named as the beam-squint effect, is a problem that should be taken into consideration for the ultrawide band systems. To overcome this problem, designing optical true time delay (TTD) lines for the antenna arrays is crucial for the development of next-generation, wideband communication, and imaging systems, which employ short pulses for wideband operation. One of the important problems for employing such short pulses is the dispersion during the propagation along the on-chip optical waveguides, which cause the distortion in the pulse shape and decrease in the amplitude of the pulse. Therefore, we propose a one-dimensional (1D) fishbone grating waveguide with a “Lego” type of step taper on silicon-on-insulator (SOI) substrate, both of which are designed for time-domain operation. The designed grating waveguide/taper pair is excited by a pulsed Gaussian light source, having a FWHM of 90 fs at a center wavelength of 1550 nm, where we investigate the possibility of controlling the dispersion by using SiO2 cladding modulation and taper structure optimization using genetic algorithm. The simulation results show that it is possible to decrease the dispersion in terms of the amplitude of the pulse up to 85%. The simulation results also show that the coupling efficiency from the taper to the waveguide can be increased up to 73%, which also decrease the dispersion of the pulse significantly. The simulated bandwidth of the grating waveguide/taper pair is found to be 56 nm, which allows ultrawide band operation.
A waveguide-to-substrate, vertical bend coupler that is based on genetic algorithm is introduced to couple and direct the optical flow in 3D photonic integrated circuits. The vertical coupler device enables high-efficiency broadband optical transmission between different dielectric layers over comparable distances to the coupler’s length. The vertical coupler attains an adept transition between a silicon waveguide and a planar Si layer separated by a SiO2 spacer. The simulation results of the designed vertical coupler device show a coupling ratio of -3.4 dB at 1550 nm wavelength and at 1 μm vertical transition depth, thanks to the effective manipulation of light. The coupler possesses a miniscule area of 2 μm × 2 μm compared to its conventional counterparts. Our proposed waveguide-to-substrate coupler represents an unprecedented, elevated solution with high-efficiency and broadband operation for the vertical transition in 3D photonic integrated circuits. It can take an important part in overcoming the obstacles on the way of 3D photonic integrated circuits for virtual reality and quantum computing applications.
Silicon photonics on silicon-on-insulator (SOI) technology has great potential in the integrated photonics field. Propagation modes are mostly confined within Silicon waveguides because of the high refraction index difference between silicon waveguide and silicon dioxide cladding. Nowadays, couplers designed using this special feature of SOI are in demand. Edge coupler and grating coupler are the two most preferred coupler types for coupling light between integrated photonic circuits and single-mode optical fibers. In this work, we focused on grating couplers to couple light from fiber to horizontal waveguide since their advantages are easy fiber alignment, lower cost, compact design, and more possible optic inputs/outputs. However, in the literature, the fabrication process of grating couplers with high coupling efficiency is complicated. Therefore, in this paper, we are proposing a grating coupler design with standard SOI lithography technology with a minimum feature size of 250 nm. In our research, the finite difference time domain (FDTD) method is utilized to analyze and design the grating coupler structure with a center of 1.55 μm. We used a genetic algorithm (GA) and particle swarm optimization (PSO) to optimize grating coupler features. SiO2 cladding thickness, SiO2 buried oxide layer thickness, grating widths, and fiber distance from grating couplers are optimized with these optimization processes. Our design is an apodized grating coupler with a -3.29 dB (46.8%) coupling efficiency and a 3 dB bandwidth of 78 nm. The design layer of the grating coupler is 12 μm × 16 μm.
We present design and simulation of spoof Surface Plasmon Polariton (sSPP) delay lines with same physical length to compose a 1-bit 180ᵒ phase shifter at 1 THz. The sSPP delay lines are based on single conductor waveguide, which has rectangular and identical corrugations on both sides and is attached to a dielectric. The delay lines are engineered by determining only the corrugation depths and keeping all the other parameters same as each other. The corrugation depths of the delay lines vary between 4.5 μm and 15.75 μm. The average percentage phase error, insertion and return losses of 207 μm delay lines are %2.6, -2.2 dB and -17.54 dB at 1 THz, respectively.
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