A 1280x1024 Readout Integrated Circuit (ROIC) with 15 μm pixel pitch for MWIR and LWIR applications is designed in 0.18 μm CMOS process. Integrate-Then-Read (ITR) and Integrate-While-Read (IWR) configurations are supported in snapshot mode. The ROIC pixel topology is direct injection (DI) with 3-bit programmable pixel gain. The minimum charge capacity is 0.8 Mé and the maximum full-well-capacity (FWC) is more than 13.2 Mé in ITR mode. 2, 4, 8, and 16 analog video output modes are also supported with a maximum frame rate of 240 fps at 16-output mode. A digital serial interface is used to program timing registers and analog biases. Integration time is programmable with 0.1 μs resolution up to 429 second using 10 MHz clock frequency. The pixel supports binning, windowing and anti-blooming functions. Digital and analog blocks of the ROIC operates using 1.8V and 3.3V supplies. The power consumption is less than 175 mW in 4-output mode of operation at 30 fps.
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