Proceedings Article | 16 November 2007
KEYWORDS: Beam shaping, Etching, Line edge roughness, Lithography, Semiconducting wafers, Manufacturing, Nanoimprint lithography, Quartz, Vestigial sideband modulation, Photomasks
NIL (nano-imprint lithography) is expected as one of the lithographic candidates for 32nm node and beyond.
Recently, the small line edge roughness (LER) as well as the potentially high resolution that will ensure no-OPC mask
feature is attracting many researchers. However, the NIL needs 1X patterns on template and a transit from 4X to 1X is a
big and hard technology jump for the mask industry. The fine resolution pattern making on the template is one of the
most critical issues for the realization of NIL.
In this paper, as a continuation of our previous works1-5, we have achieved further resolution by optimizing
the materials, their thicknesses, the developing and the etching processes, as well as the writing parameters of the
100keV SB (spot beam) writer. At the best resolved point on the template, resolutions down to hp (half pitch) 18nm on
dense line patterns, hp20nm on dense hole patterns, and hp26nm on dense dot patterns were confirmed. Concerning
stable pattern resolution over a certain field area, we evaluated pattern resolution through over a 250um square area,
which we think would be adequate for initial imprint tests. For the 250μm square area, we confirmed pattern resolution
of hp24nm for dense line patterns and hp32nm for dense hole patterns.
In addition, we have studied resolution limit of the 50keV VSB (variable shaped beam) photomask
production writing tools, which have been commonly used tools in the 4X photomask manufacturing for larger field size
patterning. Materials, process conditions and parameters acquired through the 100keV SB process were implanted, and
we could fabricate templates with hp32nm dense line patterns, with acceptable full chip uniformity and writing time.
We also studied the imprint capability, and fabricated a template with fine features and imprinted it onto a
wafer. As a result, we could transfer hp24nm dense line patterns, hp24nm dense hole patterns, and hp32nm dense dot
patterns onto the wafer.
