A cost-efficient technique for full-chip source and mask optimization is proposed in this paper. This technique has two
components: SMO source optimization for full-chip and flexible mask optimization (FMO). During the technology
development stage of source optimization, a novel pattern-selection technique was used to identify critical clips from a
full-set of design clips; SMO was then used to optimize the source based on those selected critical-clips. This pattern-selection
technique enables reasonable SMO runtime to optimize the source that covers the full range of patterns. During
the process development stage and product tapeout stage, FMO is employed. The FMO framework allows the use of
different OPC computational techniques on different chip areas that have different sensitivities to process variations.
Advanced OPC methods are applied only where they are needed, therefore achieving optimum process performance with
the least tapeout and mask cost.
KEYWORDS: Extreme ultraviolet, Data modeling, Photomasks, Scattering, Monte Carlo methods, Point spread functions, Process modeling, Electron beams, Tantalum, Chromium
In electron beam writing on EUV mask, it has been reported that CD linearity does not show simple signatures as
observed with conventional COG (Cr on Glass) masks because they are caused by scattered electrons form EUV mask
itself which comprises stacked heavy metals and thick multi-layers. To resolve this issue, Mask Process Correction
(MPC) will be ideally applicable. Every pattern is reshaped in MPC. Therefore, the number of shots would not increase
and writing time will be kept within reasonable range. In this paper, MPC is extended to modeling for correction of CD
linearity errors on EUV mask. And its effectiveness is verified with simulations and experiments through actual writing
test.
In order to support complex optical masks today and EUV masks in the near future, it is critical to correct mask
patterning errors with a magnitude of up to 20nm over a range of 2000nm at mask scale caused by short range mask
process proximity effects. A new mask process correction technology, MPC+, has been developed to achieve the target
requirements for the next generation node. In this paper, the accuracy and throughput performance of MPC+ technology
is evaluated using the most advanced mask writing tool, the EBM-70001), and high quality mask metrology .
The accuracy of MPC+ is achieved by using a new comprehensive mask model. The results of through-pitch and
through-linewidth linearity curves and error statistics for multiple pattern layouts (including both 1D and 2D patterns)
are demonstrated and show post-correction accuracy of 2.34nm 3σ for through-pitch/through-linewidth linearity.
Implementing faster mask model simulation and more efficient correction recipes; full mask area (100cm2) processing
run time is less than 7 hours for 32nm half-pitch technology node.
From these results, it can be concluded that MPC+ with its higher precision and speed is a practical technology for the
32nm node and future technology generations, including EUV, when used with advance mask writing processes like the
EBM-7000.
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