Dr. Michael W. Haney Profile

Dr. Michael W. Haney

Program Manager at Univ of Delaware

SPIE Involvement:

Author

Publications (21)

Proceedings Article | 5 September 2014 Paper

Paper

Decentralized nonimaging micro-optical concentrator

Tian Gu, William Sweatt, Gautam Agrawal, Bradley Jared, Ben Anderson, Ron Goeke, Brenton Elisberg, Scott Paap, Jose Luis Cruz-Campa, Vipin Gupta, Murat Okandan, Gregory Nielson, Michael Haney

Proceedings Volume 9191, 91910G (2014) https://doi.org/10.1117/12.2062286

KEYWORDS: Solar cells, Solar concentrators, Optical components, Reflectivity, Transmittance, Optical design, Prototyping, Integrated optics, Glasses, Monte Carlo methods

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Proceedings Article | 8 March 2014 Paper

Paper

Chip-to-chip optical interconnects based on flexible integrated photonics

Lan Li, Yi Zou, Hongtao Lin, Juejun Hu, Xiaochen Sun, Ning-Ning Feng, Sylvain Danto, Kathleen Richardson, Tian Gu, Michael Haney

Proceedings Volume 8991, 89910T (2014) https://doi.org/10.1117/12.2037812

KEYWORDS: Waveguides, Optical interconnects, Photonics, Glasses, Packaging, Adhesives, Optical alignment, Laser bonding, Vertical cavity surface emitting lasers, Resonators

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Proceedings Article | 14 March 2013 Open Access

Open Access

Paper

How will photonic integrated circuits develop?

Michael Haney

Proceedings Volume 8629, 86290L (2013) https://doi.org/10.1117/12.2008352

KEYWORDS: Photonic integrated circuits, Solar cells, Silicon, Signal processing, Analog electronics, Integrated optics, Packaging, Remote sensing, Silicon photonics, Biosensing

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SPIE Journal Paper | 6 April 2012

Dual-prism coupler for board-level free-space optical interconnects: design and simulations

Rohit Nair, Keith Goossen, Michael Haney

OE, Vol. 51, Issue 4, 045401, (April 2012) https://doi.org/10.1117/12.10.1117/1.OE.51.4.045401

KEYWORDS: Vertical cavity surface emitting lasers, Optical interconnects, Modulators, Reliability, Modulation, Tolerancing, Optical design, Prisms, Quantum wells, Interfaces

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Proceedings Article | 3 February 2012 Paper

Paper

Chip-scale integrated optical interconnects: a key enabler for future high-performance computing

Michael Haney, Rohit Nair, Tian Gu

Proceedings Volume 8267, 82670X (2012) https://doi.org/10.1117/12.910249

KEYWORDS: Waveguides, Modulators, Metals, Computing systems, Integrated optics, Packaging, Silicon, Photodetectors, Telecommunications, Optical interconnects

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High Performance Computing (HPC) systems are putting ever-increasing demands on the throughput efficiency of their interconnection fabrics. In this paper, the limits of conventional metal trace-based inter-chip interconnect fabrics are examined in the context of state-of-the-art HPC systems, which currently operate near the 1 GFLOPS/W level. The analysis suggests that conventional metal trace interconnects will limit performance to approximately 6 GFLOPS/W in larger HPC systems that require many computer chips to be interconnected in parallel processing architectures. As the HPC communications bottlenecks push closer to the processing chips, integrated Optical Interconnect (OI) technology may provide the ultra-high bandwidths needed at the inter- and intra-chip levels. With inter-chip photonic link energies projected to be less than 1 pJ/bit, integrated OI is projected to enable HPC architecture scaling to the 50 GFLOPS/W level and beyond - providing a path to Peta-FLOPS-level HPC within a single rack, and potentially even Exa-FLOPSlevel HPC for large systems. A new hybrid integrated chip-scale OI approach is described and evaluated. The concept integrates a high-density polymer waveguide fabric directly on top of a multiple quantum well (MQW) modulator array that is area-bonded to the Silicon computing chip. Grayscale lithography is used to fabricate 5 μm x 5 μm polymer waveguides and associated novel small-footprint total internal reflection-based vertical input/output couplers directly onto a layer containing an array of GaAs MQW devices configured to be either absorption modulators or photodetectors. An external continuous wave optical "power supply" is coupled into the waveguide links. Contrast ratios were measured using a test rider chip in place of a Silicon processing chip. The results suggest that sub-pJ/b chip-scale communication is achievable with this concept. When integrated into high-density integrated optical interconnect fabrics, it could provide a seamless interconnect fabric spanning the intra-

Proceedings Article | 23 February 2010 Paper

Paper

Modulation-enabled tapered remote coupler: all-optical communication on and off chip

Tian Gu, Rohit Nair, Michael Haney

Proceedings Volume 7607, 76070H (2010) https://doi.org/10.1117/12.845996

KEYWORDS: Modulators, Waveguides, Modulation, Optical interconnects, Geometrical optics, Free space optics, Refractive index, Silicon, Singular optics, Optoelectronics

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Proceedings Article | 28 February 2006 Paper

Paper

Progress toward optical interconnects for intrachip global communication

Michael Haney, Muzammil Iqbal, Michael McFadden, Thomas Dillon, Dennis Prather

Proceedings Volume 6126, 61260A (2006) https://doi.org/10.1117/12.661293

KEYWORDS: Optical interconnects, Metals, Modulators, Silicon, Free space optics, Logic, Waveguides, Prisms, Optical communications, Clocks

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Proceedings Article | 7 March 2005 Paper

Paper

A dual-rate optical transceiver for power-on-demand operation

Yongrong Zuo, Fouad Kiamilev, Xiaoqing Wang, Ping Gui, Xingle Wang, Jeremy Ekman, Michael McFadden, Michael Haney

Proceedings Volume 5730, (2005) https://doi.org/10.1117/12.601767

KEYWORDS: Transceivers, Receivers, Switching, Transmitters, Vertical cavity surface emitting lasers, Transistors, Eye, Data transmission, Free space optics, Optical interconnects

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Proceedings Article | 8 November 2001 Paper

Paper

Smart-pixel-based free-space interconnects: solving the high-speed multichip packaging bottleneck

Michael Haney, Marc Christensen, Predrag Milojkovic, Michael McFadden

Proceedings Volume 4534, (2001) https://doi.org/10.1117/12.448005

KEYWORDS: Vertical cavity surface emitting lasers, Optical interconnects, Prototyping, Optical components, Chemical elements, Packaging, Optical design, Distortion, Photodetectors, Switching

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As IC densities grow to 100's of millions of devices per chip and beyond, the inter-chip link bandwidth becomes a critical performance-limiting bottleneck in many applications. Electronic packaging technology has not kept pace with the growth of IC I/O requirements. Recent advances in smart pixel technology, however, offer the potential to use 3-D optical interconnects to overcome the inter-chip I/O bottleneck by linking dense arrays of Vertical Cavity Surface Emitting Lasers (VCSELs) and photodetectors, which are directly integrated onto electronic IC circuits. Many switching and parallel computing applications demand multi-chip interconnection fabrics that achieve high-density global I/O across an array of chips. Such global interconnections require a high degree of space-variance in the interconnection fabric, in addition to high inter-chip throughput capacity. This paper reviews the architectural and optical design issues associated with global interconnections among arrays of chips. The emphasis is on progress made in the design and implementation of the second generation Free-space Accelerator for Switching Terabit Networks (FAST-Net) prototype. The FAST-Net prototype uses a macro-optical lens array and mirror to effect a global (fully connected) fabric across a 4 X 4 array of smart pixel chips. Clusters of VCSELs and photodetectors are imaged onto corresponding clusters on other chips, creating a high- density bi-directional data path between every pair of smart pixel chips on a multi-chip module. The combination of programmable intra-chip electronic routing and the fixed global inter-chip optical interconnection pattern of the FAST- Net architecture has been shown to provide a low latency, minimum complexity fabric, that can effect an arbitrary interconnection pattern across the chip array. Recent experimental results show that the narrow beam characteristics of VCSELs can be exploited in an efficient optical design for the FAST-Net optical interconnection module. A new design combines micro-, mini-, and macro-optical elements to achieve the required high registration and resolution accuracy while minimizing the packaging and alignment complexity.

Proceedings Article | 24 May 2000 Paper

Paper

High-speed free-space scalable switching network for parallel computing

Premanand Chandramani, Jeremy Ekman, P. Gui, Xiaoqing Wang, Fouad Kiamilev, K. Driscoll, B. Vanvoorst, Fred Rose, Jim Nohava, J. Allen Cox, Marc Christensen, Predrag Milojkovic, Michael Haney

Proceedings Volume 4089, (2000) https://doi.org/10.1117/12.386879

KEYWORDS: Switches, Field programmable gate arrays, Prototyping, Interfaces, Computing systems, Telecommunications, Switching, Computer architecture, Optical networks, Receivers

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Proceedings Article | 24 May 2000 Paper

Paper

Minimum lens complexity design approach for a free-space macro-optical multichip global interconnection module

Predrag Milojkovic, Marc Christensen, Michael Haney

Proceedings Volume 4089, (2000) https://doi.org/10.1117/12.386785

KEYWORDS: Vertical cavity surface emitting lasers, Spherical lenses, Ray tracing, Sensors, Lens design, Aspheric lenses, Geometrical optics, Optical design, Imaging systems, OSLO

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Proceedings Article | 24 May 2000 Paper

Paper

Micro- vs. macro-optics in free-space optical interconnects

Michael Haney

Proceedings Volume 4089, (2000) https://doi.org/10.1117/12.386822

KEYWORDS: Optical interconnects

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Proceedings Article | 22 May 1998 Paper

Paper

Compact acousto-optic system for real-time synthetic aperture radar image formation

Michael Haney, Marc Christensen, Robert Michael, Peter Wasilousky, Dennis Pape

Proceedings Volume 3490, (1998) https://doi.org/10.1117/12.308889

KEYWORDS: Synthetic aperture radar, Charge-coupled devices, Adaptive optics, Radar, Image processing, Image acquisition, Prototyping, Acousto-optics, Signal processing, Image filtering

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Proceedings Article | 22 May 1998 Paper

Paper

FAST-Net optical interconnection prototype demonstration

Michael Haney, Marc Christensen, Predrag Milojkovic, Jeremy Ekman, Premanand Chandramani, Richard Rozier, Fouad Kiamilev, Yue Liu, Mary Hibbs-Brenner, Jim Nohava, Edith Kalweit, Sommy Bounnak, Terry Marta, B. Walterson

Proceedings Volume 3490, (1998) https://doi.org/10.1117/12.308879

KEYWORDS: Vertical cavity surface emitting lasers, Prototyping, Optical interconnects, Photodetectors, Mirrors, Sensors, Receivers, Gallium arsenide, Metals, Palladium

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Highly interconnected multiprocessor systems are now performance limited by the backplane interconnection bottleneck associated with planar interconnection technologies. Smart pixel throughput capabilities are projected to exceed I Thitls/cm2 [1] and offer the promise of overcoming the bottlenecks of planar technologies for many types of interconnection-limited multiprocessor problems. Systems that use smart pixel-based free space optical interconnects (FSOI) provide two general dense interconnection capabilities: intelligent parallel data transfer and intelligent parallel data interchange. Optical imaging provides a high throughput approach to linking smart pixel planes for data transfer. In this case the high 110 density of smart pixels may provide a power consumption and size advantage over electronics [2,3]. For data interchange, FSOI provides the additional ability to perform the data partitioning and interleaving useful in space variant link interconnection patterns like the perfect shuffle (PS) [41,which are inherently difficult to implement in planar interconnection technologies. Such patterns are characterized by high BSBW [51. In multi-processor architecture design, there is a direct trade-off between minimum BSBW and latency in a network. It is therefore generally desirable to implement networks with the largest minimum BSBW that can be practically achieved to solve a given problem. The ability of optical elements to interconnect large arrays in space-variant patterns, without crosstalk in the medium, suggests that FSOI techniques are particularly promising for problems with high BSBW. For problems with greater than 1 ThitJsec BSBW (i.e., greater than the capabilities of a single chip) free space optical interconnects have a marked advantage [6,71. Therefore, globally interconnected multi-chip smart pixel based architectures have the potential to reap the full benefits of FSOI. This paper describes the experimental demonstration of a smart pixel based optical interconnection prototype currently being developed under the Free-space Accelerator for Switching Terabit tworks (FAST-Net) project, sponsored by the U.S. Defense Advanced Research Projects Agency. The prototype system incorporates 2-D arrays of monolithically integrated high-bandwidth vertical cavity surface emitting lasers (VCSELs) and photodetectors (PDs). A key aspect of the FAST-Net concept is that all smart pixels are distributed across a single multi-chip plane. This plane is connected to itself via an optical system that consists of an array of matched lenses (one for each smart pixel chip position) and a mirror. The optical interconnect system implements a global point-to-point shuffle pattern. The interleaved 2-D arrays of VCSELs and PDs in the prototype are arranged on a clustered self-similar grid pattern with a closest element pitch of 100 tm. The circular VCSEL elements have a diameter of 10 pm and the square PDs have an active region that is 50 jim wide. These arrays are packaged and mounted on printed circuit boards along with CMOS driver, receiver, and FPGA controller chips. Micro-positioning mounts are used to effect alignment that is consistent with current MCM chip placement accuracy. Shuffled optical data links between the multiple ICs have been demonstrated in preliminary evaluation of this system. These results suggest that a multi-Terabit optically interconnected MCM module is feasible.

Proceedings Article | 5 May 1998 Paper

Paper

FAST-Net optical interconnection prototype demonstration program

Michael Haney, Marc Christensen, P. Milojkovik, Jeremy Ekman, Premanand Chandramani, Richard Rozier, Fouad Kiamilev, Yue Liu, Mary Hibbs-Brenner, Jim Nohava, Edith Kalweit, Sommy Bounnak, Terry Marta, B. Walterson

Proceedings Volume 3288, (1998) https://doi.org/10.1117/12.307576

KEYWORDS: Vertical cavity surface emitting lasers, Prototyping, Optical interconnects, Modulation, Photodetectors, Palladium, Mirrors, Receivers, Lenses, Field programmable gate arrays

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Proceedings Article | 16 June 1995 Paper

Paper

Compact time- and space-integrating SAR processor: performance analysis

Michael Haney, James Levy, Robert Michael, Marc Christensen

Proceedings Volume 2489, (1995) https://doi.org/10.1117/12.212036

KEYWORDS: Synthetic aperture radar, Image processing, Scanners, Adaptive optics, Prototyping, Acousto-optics, Image acquisition, Bragg cells, Charge-coupled devices, Analog electronics

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Proceedings Article | 17 June 1994 Paper

Paper

Compact time- and space-integrating SAR processor: design and development status

Michael Haney, James Levy, Marc Christensen, Robert Michael, Michael Mock

Proceedings Volume 2236, (1994) https://doi.org/10.1117/12.178061

KEYWORDS: Synthetic aperture radar, Bragg cells, Image processing, Charge-coupled devices, Radar, Analog electronics, Optical design, Prototyping, Interfaces, Semiconductor lasers

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Proceedings Article | 17 September 1993 Paper

Paper

Acousto-optic time- and space-integrating spotlight-mode SAR processor

Michael Haney, James Levy, Robert Michael

Proceedings Volume 1958, (1993) https://doi.org/10.1117/12.157126

KEYWORDS: Synthetic aperture radar, Image processing, Radar, Analog electronics, Charge-coupled devices, Image acquisition, Bragg cells, Acousto-optics, Prototyping, Fourier transforms

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Proceedings Article | 2 December 1992 Paper

Paper

Minimum-complexity optical architecture for look-up table computation in the residue number system

Ravindra Athale, Michael Haney, James Levy, Gary Euliss

Proceedings Volume 1703, (1992) https://doi.org/10.1117/12.138410

KEYWORDS: Radon, Modulators, Spatial light modulators, Computing systems, Light emitting diodes, Semiconductor lasers, Computer architecture, Switching, Binary data, Active optics

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Proceedings Article | 24 August 1992 Paper

Paper

Time- and space-integrating acousto-optic SAR image-formation processor

Michael Haney, James Levy, Marc Christensen

Proceedings Volume 1704, (1992) https://doi.org/10.1117/12.139918

KEYWORDS: Synthetic aperture radar, Radar, Charge-coupled devices, Image processing, Signal processing, Acousto-optics, Fourier transforms, Image resolution, Imaging systems, Bragg cells

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Proceedings Article | 1 October 1990 Paper

Paper

Real-time acousto-optic processor for spotlight-mode synthetic aperture radar

Michael Haney

Proceedings Volume 1291, (1990) https://doi.org/10.1117/12.20985

KEYWORDS: Synthetic aperture radar, Signal processing, Radar, Acousto-optics, Image processing, Charge-coupled devices, Adaptive optics, Electronic filtering, Optical filters, Interfaces

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Showing 5 of 21 publications

Proceedings Volume Editor (2)

SPIE Conference Volume | 9 November 1993

Photonics for Processors, Neural Networks, and Memories

SPIE Conference Volume | 2 February 1993

Photonics for Computers, Neural Networks, and Memories

Conference Committee Involvement (13)

Nonimaging Optics: Efficient Design for Illumination and Solar Concentration XVIII

21 August 2022 | San Diego, California, United States

Nonimaging Optics: Efficient Design for Illumination and Solar Concentration XVII

24 August 2020 | Online Only, California, United States

Nonimaging Optics: Efficient Design for Illumination and Solar Concentration XVI

11 August 2019 | San Diego, California, United States

Nonimaging Optics: Efficient Design for Illumination and Solar Concentration XV

19 August 2018 | San Diego, California, United States

Optical Interconnects XV

9 February 2015 | San Francisco, California, United States

Showing 5 of 13 Conference Committees

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