Dr. Xinghua Sun Profile

Dr. Xinghua Sun

at TEL Technology Ctr America LLC

SPIE Involvement:

Author

Publications (5)

Proceedings Article | 26 February 2021 Presentation + Paper

Contact local CD uniformity optimization through etch shrink

Eric Miller, Junling Sun, Jennifer Church, Xinghua Sun, Angelique Raley

Proceedings Volume 11615, 116150A (2021) https://doi.org/10.1117/12.2583666

KEYWORDS: Etching, Critical dimension metrology, Optical lithography, Back end of line, Semiconducting wafers, Logic, Lithography, Dielectrics

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SPIE Journal Paper | 31 July 2018

Self-aligned blocking integration demonstration for critical sub-30-nm pitch Mx level patterning with EUV self-aligned double patterning

Angélique Raley, Joe Lee, Jeffrey Smith, Xinghua Sun, Richard Farrell, Jeffrey Shearer, Yongan Xu, Akiteru Ko, Andrew Metz, Peter Biolsi, Anton Devilliers, John Arnold, Nelson Felix

JM3, Vol. 18, Issue 01, 011002, (July 2018) https://doi.org/10.1117/12.10.1117/1.JMM.18.1.011002

KEYWORDS: Etching, Extreme ultraviolet, Line edge roughness, Optical lithography, Line width roughness, Silicon, Double patterning technology, Dielectrics, Metals, System on a chip

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Proceedings Article | 4 April 2018 Paper

Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterning

Angélique Raley, Joe Lee, Jeffrey Smith, Xinghua Sun, Richard Farrell, Jeffrey Shearer, Yongan Xu, Akiteru Ko, Andrew Metz, Peter Biolsi, Anton Devilliers, John Arnold, Nelson Felix

Proceedings Volume 10589, 105890L (2018) https://doi.org/10.1117/12.2297438

KEYWORDS: Etching, Extreme ultraviolet, Line edge roughness, Image processing, Optical lithography, Dielectrics, Silicon, Metals, Line width roughness, Double patterning technology

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Proceedings Article | 26 April 2017 Presentation + Paper

EPE improvement thru self-alignment via multi-color material integration

Nihar Mohanty, Jeffrey Smith, Lior Huli, Cheryl Pereira, Angelique Raley, Subhadeep Kal, Carlos Fonseca, Xinghua Sun, Ryan Burns, Richard Farrell, David Hetzer, Andrew Metz, Akiteru Ko, Steven Scheer, Peter Biolsi, Anton DeVillers

Proceedings Volume 10147, 1014704 (2017) https://doi.org/10.1117/12.2258108

KEYWORDS: Optical lithography, Front end of line, Back end of line, Etching, Control systems, Semiconducting wafers, Logic, Extreme ultraviolet, TCAD, Computer simulations, Photomasks, Lithography, Metals

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As the industry marches on onto the 5nm node and beyond, scaling has slowed down, with all major IDMs & foundries predicting a 3-4 year cadence for scaling. A major reason for this slowdown is not the technical challenge of making features smaller, but effective control of variation that creeps in to the fabrication process. That variability manifests itself as edge placement error (EPE), which has a direct impact on wafer yield. Simply defined as the variance between design intent vs. actual on-wafer results, EPE is one of the foremost challenges being faced by the industry at the advanced node for both logic and memory. This is especially critical at three stages: the front end of line (FEOL) STI patterning; middle of line (MOL) contact patterning; and back end of line (BEOL) trench patterning where the desired tight pitch demands EPE control beyond the capability of 193i multi-patterning or even EUV single pattern. In order to mitigate this EPE challenge, we are proposing self-alignment of blocks & cuts through a multi-color materials integration concept. This approach, termed as “Self-aligned block or Cut (SAB or SACut)”, simply trades off the un-manageable overlay requirement into a more manageable etch selectivity challenge, by having multiple materials filled in every other trench or line.

In this paper we will introduce self-alignment based block and cut strategies using multi-color materials integration and show implementation for BEOL trench block patterning. We will present a breakdown of the key unit process challenges that were needed to be resolved for enabling the self-alignment such as: (a) material selection of multi-color approach; (b) planarization of spin on materials; (c) void-free gap fill for high aspect ratio features; and last but not the least, (c) etch selectivity of etching one material with respect to all other materials exposed. Further, we will present a comparison of our new self-alignment approach with standard approaches where we will articulate the advantages in terms of EPE relaxation and mask number reduction. We will conclude our talk with a brief snapshot of the future direction of our EPE improvement strategies and our view on the future of patterning beyond 5nm node for the industry.

Proceedings Article | 7 April 2017 Presentation + Paper

Self-aligned blocking integration demonstration for critical sub-40nm pitch Mx level patterning

Angélique Raley, Nihar Mohanty, Xinghua Sun, Richard Farrell, Jeffrey Smith, Akiteru Ko, Andrew Metz, Peter Biolsi, Anton Devilliers

Proceedings Volume 10149, 101490O (2017) https://doi.org/10.1117/12.2257769

KEYWORDS: Optical lithography, Photomasks, Metals, Etching, Double patterning technology, Overlay metrology, Semiconductors, Immersion lithography, Tolerancing, Optical alignment, Dielectrics, System on a chip, Plasma, Plasma etching, Lithography, Back end of line

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